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Improvement of Deblocking Filter for AVS3

Published: 10 September 2020 Publication History

Abstract

AVS3 is the third generation audio video coding standard (AVS). And the performance of AVS3 base profile is improved by 20% compared to the H.265. This paper proposes improvements to the deblocking scheme of AVS3, which has been adopted in the AVS3 baseline profile. The deblocking scheme in AVS2 has defects, including unreasonable filtering conditions and filtering coefficients. The deblocking filter in AVS3 also has the same drawback because it inherits the deblocking scheme from AVS2. These defects lead to unsatisfactory subjective quality of the AVS3 deblocking filter. Hence this paper improves the subjective quality of the AVS3 deblocking filter by reasonably modifying the filtering conditions and filter operation. In addition, to reduce the complexity of deblocking filter in AVS3, the proposed method simplifies the filtering operation of chroma deblocking. We implement the method on top of the AVS3 reference software (HPM-2.1), and the experimental result shows that subjective quality is significantly improved. The proposed method achieves 0.28% BD-rate reduction under Random Access (RA) configuration and 0.21% BD-rate reduction under ALL INTRA (AI) configuration.

References

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J. An, H. Huang, K. Zhang. Quadtree plus binary tree structure integration with JEM tools, JVET-B0023, Joint Video Exploration Team (JVET). Feb. 2016.
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Wang M, Li J, Zhang L, et al. Extended Quad-Tree Partitioning for Future Video Coding[C]//2019 Data Compression Conference (DCC). IEEE, 2019: 300--309.
[3]
Yu, Lu, et al. "Overview of AVS-video: tools, performance and complexity." Visual Communications and Image Processing 2005. Vol. 5960. International Society for Optics and Photonics, 2006.
[4]
Gao, Wen, and Siwei Ma. Advanced video coding systems. Cham: Springer International Publishing, 2014.
[5]
Norkin, Andrey, et al. "HEVC deblocking filter." IEEE Transactions on Circuits and Systems for Video Technology22.12 (2012): 1746--1754.
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Zheng, Guo-qing, and Lu Yu. "An efficient architecture design for deblocking loop filter." Picture Coding Symposium. sn, 2004.
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Ozcan, Erdem, Yusuf Adibelli, and Ilker Hamzaoglu. "A high performance deblocking filter hardware for high efficiency video coding." IEEE Transactions on Consumer Electronics59.3 (2013): 714--720.
[8]
K. Fan, "AVS3-P2 Common test condition V6.0", AVS document N2654, Mar. 2019.

Cited By

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  • (2023)An Improved Hardware Architecture for Integer-Pixel Motion Estimation in AVS32023 IEEE International Conference on Consumer Electronics (ICCE)10.1109/ICCE56470.2023.10043407(1-6)Online publication date: 6-Jan-2023

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  1. Improvement of Deblocking Filter for AVS3

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    cover image ACM Other conferences
    ICDSP '20: Proceedings of the 2020 4th International Conference on Digital Signal Processing
    June 2020
    383 pages
    ISBN:9781450376877
    DOI:10.1145/3408127
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    • University of Electronic Science and Technology of China: University of Electronic Science and Technology of China

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    Association for Computing Machinery

    New York, NY, United States

    Publication History

    Published: 10 September 2020

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    Author Tags

    1. AVS3
    2. deblocking filter
    3. filtering condition
    4. filtering operation

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    • Research-article
    • Research
    • Refereed limited

    Funding Sources

    • National Natural Science Foundation of China
    • National Engineering Laboratory for Video Technology - Shenzhen Division
    • Shenzhen Research Projects
    • China Postdoctoral Science Fund
    • Shenzhen Key Laboratory for Intelligent Multimedia and Virtual Reality

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    ICDSP 2020

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    • (2023)An Improved Hardware Architecture for Integer-Pixel Motion Estimation in AVS32023 IEEE International Conference on Consumer Electronics (ICCE)10.1109/ICCE56470.2023.10043407(1-6)Online publication date: 6-Jan-2023

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