Networks of low-power Internet of Things do not have always access to enough computing power to support mainstream cryptographic schemes; such schemes also consume computing power that can be exposed to side channel attacks. This article describes a method, that we call “cryptography with analog scheme using memristors,” leveraging the physical properties of memristors, which are active elements suitable for the design of components such as artificial neurons. The proposed devices encrypt messages by segmenting them into blocks of bits, each modulating the injected currents into randomly selected memristor cells, resulting into sets of resistance values turned into cipher texts. Through hash-protected handshakes, identical addresses are independently generated by both communicating devices, to concurrently point at the same set of cells in the arrays, and their images. These block ciphers, for example, 1 KB long, can only be decrypted with the same memristor array driven by analog circuitry or its image, rather than digital key-based schemes. The proposed methods generate cipher text, and decrypt them, with approximately one femto joule per bit, which is below observable level through differential power analysis. The article explains how the use of different cells for each message to encrypt, driven under different conditions, has the potential to mitigate mainstream attacks. It provides a detailed characterization of memristors to evaluate the feasibility of the approach and discusses some hardware and architectures to implement the scheme.