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Test Generation for Hardware Trojan Detection Using Correlation Analysis and Genetic Algorithm

Published: 26 March 2021 Publication History

Abstract

Hardware Trojan (HT) is a major threat to the security of integrated circuits (ICs). Among various HT detection approaches, side channel analysis (SCA)-based methods have been extensively studied. SCA-based methods try to detect HTs by comparing side channel signatures from circuits under test with those from trusted golden references. The pre-condition for SCA-based HT detection to work is that the testers can collect extra signatures/anomalies introduced by activated HTs. Thus, activation of HTs and amplification of the differences between circuits under test and golden references are the keys to SCA-based HT detection methods. Test vectors are of great importance to the activation of HTs, but existing test generation methods have two major limitations. First, the number of test vectors required to trigger HTs is quite large. Second, the HT circuit’s activities are marginal compared with the whole circuit’s activities. In this article, we propose an optimized test generation methodology to assist SCA-based HT detection. Considering the HTs’ inherent surreptitious nature, inactive nodes with low transition probability are more likely to be selected as HT trigger nodes. Therefore, the correlations between circuit inputs and inactive nodes are first exploited to activate HTs. Then a test reordering process based on the genetic algorithm (GA) is implemented to increase the proportion of the HT circuit’s activities to the whole circuit’s activities. Experiments on 10 selected ISCAS benchmarks, wb_conmax benchmark, and b17 benchmark demonstrate that the number of test vectors required to trigger HTs reduces 28.8% on average compared with the result of MERO and MERS methods. After the test vector reordering process, the proportion of the HT circuit’s activities to the whole circuit’s activities is improved by 95% on average, compared with the result of MERS method.

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    cover image ACM Transactions on Embedded Computing Systems
    ACM Transactions on Embedded Computing Systems  Volume 20, Issue 4
    Special Issue on FDL2019
    July 2021
    256 pages
    ISSN:1539-9087
    EISSN:1558-3465
    DOI:10.1145/3458852
    • Editor:
    • Tulika Mitra
    Issue’s Table of Contents
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Publication History

    Published: 26 March 2021
    Accepted: 01 January 2021
    Revised: 01 December 2020
    Received: 01 August 2020
    Published in TECS Volume 20, Issue 4

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    Author Tags

    1. Hardware trojan detection
    2. correlation analysis
    3. side channel analysis
    4. test generation
    5. test reordering

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    • (2024)HT-PGFV: Security-Aware Hardware Trojan Security Property Generation and Formal Security Verification SchemeElectronics10.3390/electronics1321428613:21(4286)Online publication date: 31-Oct-2024
    • (2024)Robust Hardware Trojan Detection Method by Unsupervised Learning of Electromagnetic SignalsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2024.345889232:12(2327-2340)Online publication date: 1-Dec-2024
    • (2024)Feature extraction and classification algorithm of open source Trojan family variants based on graph network2024 IEEE 4th International Conference on Electronic Technology, Communication and Information (ICETCI)10.1109/ICETCI61221.2024.10594066(82-87)Online publication date: 24-May-2024
    • (2024)Exploring the PSO-Driven Test Pattern Generation Approach for Hardware Trojan Detection2024 IEEE International Conference on Interdisciplinary Approaches in Technology and Management for Social Innovation (IATMSI)10.1109/IATMSI60426.2024.10502952(1-6)Online publication date: 14-Mar-2024
    • (2024)Towards the Detection of Hardware Trojans with Cost Effective Test Vectors using Genetic AlgorithmJournal of Electronic Testing: Theory and Applications10.1007/s10836-024-06122-w40:3(371-385)Online publication date: 1-Jun-2024
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    • (2023)Toward the Generation of Test Vectors for the Detection of Hardware Trojan Targeting Effective Switching ActivityACM Journal on Emerging Technologies in Computing Systems10.1145/359749719:4(1-16)Online publication date: 19-May-2023
    • (2023)Scalable Detection of Hardware Trojans Using ATPG-Based Activation of Rare EventsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2023.329053742:12(4450-4462)Online publication date: 1-Dec-2023
    • (2023)Hunting for Hardware Trojan in Gate Netlist: A Stacking Ensemble Learning Perspective2023 IEEE International Test Conference in Asia (ITC-Asia)10.1109/ITC-Asia58802.2023.10301162(1-6)Online publication date: 12-Sep-2023
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