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A System and Its Implementation Based on FPGA for Video JPEG2000 Codec and Network Transmission

Published:23 September 2021Publication History

ABSTRACT

This paper brings forward a system and its implementation based on FPGA (Field-Programmable Gate Array) for video JPEG2000 codec and network transmission. According to configuring instructions from upper monitors of the encoding terminal and the decoding terminal, the FPGAs implemented configuring and then controlling of JPEG2000 codec chips and network communication chips. The encoding terminal converted analog video signal to digital signal for JPEG2000 codec's encoding, then sent coded data to the network communication chip to generate network messages which were then sent out to the Ethernet network. The decoding terminal received network messages from the Ethernet network through the network communication chip on it, then sent coded data to the JPEG2000 codec for decoding, finally converted digital video to analog signal for displaying. In this design, the system gave full play to the functions of each part, met real-time requirements in video or image encoding, decoding, and network transmission requirements.

References

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  • Published in

    cover image ACM Other conferences
    ICDSP '21: Proceedings of the 2021 5th International Conference on Digital Signal Processing
    February 2021
    336 pages
    ISBN:9781450389365
    DOI:10.1145/3458380

    Copyright © 2021 ACM

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    Association for Computing Machinery

    New York, NY, United States

    Publication History

    • Published: 23 September 2021

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