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PHANES: ReRAM-based photonic accelerator for deep neural networks

Published: 23 August 2022 Publication History

Abstract

Resistive random access memory (ReRAM) has demonstrated great promises of in-situ matrix-vector multiplications to accelerate deep neural networks. However, subject to the intrinsic properties of analog processing, most of the proposed ReRAM-based accelerators require excessive costly ADC/DAC to avoid distortion of electronic analog signals during inter-tile transmission. Moreover, due to bit-shifting before addition, prior works require longer cycles to serially calculate partial sum compared to multiplications, which dramatically restricts the throughput and is more likely to stall the pipeline between layers of deep neural networks.
In this paper, we present a novel ReRAM-based photonic accelerator (PHANES) architecture, which calculates multiplications in ReRAM and parallel weighted accumulations during optical transmission. Such photonic paradigm also serves as high-fidelity analog-analog links to further reduce ADC/DAC. To circumvent the memory wall problem, we further propose a progressive bit-depth technique. Evaluations show that PHANES improves the energy efficiency by 6.09x and throughput density by 14.7x compared to state-of-the-art designs. Our photonic architecture also has great potentials for scalability towards very-large-scale accelerators.

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Cited By

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  • (2025)OpticalHDC: Ultra-fast Photonic Hyperdimensional Computing AcceleratorProceedings of the 30th Asia and South Pacific Design Automation Conference10.1145/3658617.3697709(748-753)Online publication date: 20-Jan-2025
  • (2024)PhotonNTT: Energy-Efficient Parallel Photonic Number Theoretic Transform Accelerator2024 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE58400.2024.10546638(1-6)Online publication date: 25-Mar-2024
  • (2023)Photonic Binary Convolutional Neural Network Based on Microring Resonator ArrayIEEE Photonics Technology Letters10.1109/LPT.2023.327214835:12(664-667)Online publication date: 15-Jun-2023

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cover image ACM Conferences
DAC '22: Proceedings of the 59th ACM/IEEE Design Automation Conference
July 2022
1462 pages
ISBN:9781450391429
DOI:10.1145/3489517
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than the author(s) must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected].

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Publication History

Published: 23 August 2022

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Author Tags

  1. ADC/DAC-reduced
  2. deep learning acceleration
  3. in-memory computing
  4. photonic computing
  5. scalability

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DAC '22
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DAC '22: 59th ACM/IEEE Design Automation Conference
July 10 - 14, 2022
California, San Francisco

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

View all
  • (2025)OpticalHDC: Ultra-fast Photonic Hyperdimensional Computing AcceleratorProceedings of the 30th Asia and South Pacific Design Automation Conference10.1145/3658617.3697709(748-753)Online publication date: 20-Jan-2025
  • (2024)PhotonNTT: Energy-Efficient Parallel Photonic Number Theoretic Transform Accelerator2024 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE58400.2024.10546638(1-6)Online publication date: 25-Mar-2024
  • (2023)Photonic Binary Convolutional Neural Network Based on Microring Resonator ArrayIEEE Photonics Technology Letters10.1109/LPT.2023.327214835:12(664-667)Online publication date: 15-Jun-2023

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