skip to main content
10.1145/3489517.3530604acmconferencesArticle/Chapter ViewAbstractPublication PagesdacConference Proceedingsconference-collections
research-article

Verifying SystemC TLM peripherals using modern C++ symbolic execution tools

Published: 23 August 2022 Publication History

Abstract

In this paper we propose an effective approach for verification of real-world SystemC TLM peripherals using modern C++ symbolic execution tools. We designed a lightweight SystemC peripheral kernel that enables an efficient integration with the modern symbolic execution engine KLEE and acts as a drop-in replacement for the normal SystemC kernel on pre-processed TLM peripherals. The pre-processing step essentially replaces context switches in SystemC threads with normal function calls which can be handled by KLEE. Our experiments, using a publicly available RISC-V specific interrupt controller, demonstrate the scalability and bug hunting effectiveness of our approach.

References

[1]
2020. SiFive FE310-G000 Manual. Retrieved 2020-09-17 from https://sifive.cdn.prismic.io/sifive%2F500a69f8-af3a-4fd9-927f-10ca77077532_fe310-g000.pdf
[2]
Cristian Cadar, Daniel Dunbar, and Dawson Engler. 2008. KLEE: Unassisted and Automatic Generation of High-Coverage Tests for Complex Systems Programs. In Proceedings of the 8th USENIX Conference on Operating Systems Design and Implementation (San Diego, California) (OSDI'08). USA, 209--224.
[3]
C. Chou, C. Chu, and C. Huang. 2013. Conquering the Scheduling Alternative Explosion Problem of SystemC Symbolic Simulation. In ICCAD.
[4]
Chun-Nan Chou, Yen-Sheng Ho, Chiao Hsieh, and Chung-Yang Huang. 2012. Symbolic model checking on SystemC designs. In DAC. 327--333.
[5]
Alessandro Cimatti, Iman Narasamdya, and Marco Roveri. 2013. Software Model Checking SystemC. TCAD 32, 5 (2013), 774--787.
[6]
Philippe Coussy, Andres Takach, Michael McNamara, and Mike Meredith. 2010. An Introduction to the SystemC Synthesis Subset Standard. 183--184.
[7]
D. Große, H. M. Le, and R. Drechsler. 2010. Proving Transaction and System-level Properties of Untimed SystemC TLM Designs. In MEMOCODE. 113--122.
[8]
P. Herber, J. Fellmuth, and S. Glesner. 2008. Model Checking SystemC Designs Using Timed Automata. In CODES+ISSS. 131--136.
[9]
Paula Herber, Marcel Pockrandt, and Sabine Glesner. 2011. Transforming SystemC Transaction Level Models into UPPAAL timed automata. In Ninth ACM/IEEE MEMPCODE 2011. 161--170.
[10]
P. Herber, M. Pockrandt, and S. Glesner. 2015. STATE - A SystemC to Timed Automata Transformation Engine. In HPCC-CSS-ICESS.
[11]
Vladimir Herdt, Hoang M. Le, Daniel Große, and Rolf Drechsler. 2019. Verifying SystemC using Intermediate Verification Language and Stateful Symbolic Simulation. IEEE Transactions on Computer Aided Design of Circuits and Systems 38, 7 (July 2019), 1359--1372.
[12]
Vladimir Herdt, Hoang M. Le, Daniel Große, and Rolf Drechsler. 2016. Compiled Symbolic Simulation for SystemC. In ICCAD. 52:1--52:8.
[13]
D. Karlsson, P. Eles, and Z. Peng. 2006. Formal Verification of Systemc Designs Using a Petri-net Based Representation. In DATE. 1228--1233.
[14]
D. Kroening and N. Sharygina. 2005. Formal Verification of SystemC by Automatic Hardware/Software Partitioning. In MEMOCODE.
[15]
Hoang M. Le, Vladimir Herdt, Daniel Große, and Rolf Drechsler. 2016. Towards formal verification of real-world SystemC TLM peripheral models - a case study. In 2016 DATE. 1160--1163.
[16]
Timm Liebrenz, Verena Klös, and Paula Herber. 2017. Automatic Analysis and Abstraction for Model Checking HW/SW Co-Designs Modeled in SystemC. Ada Lett. 36, 2 (May 2017), 9--17.
[17]
Bin Lin, Zhenkun Yang, Kai Cong, and Fei Xie. 2016. Generating high coverage tests for SystemC designs using symbolic execution. In 2016 21st ASP-DAC. 166--171.
[18]
M. Moy, F. Maraninchi, and L. Maillet-Contoz. 2005. LusSy: An open tool for the analysis of systems-on-a-chip at the transaction level. ACSD 10, 2--3 (2005), 73--104.
[19]
OSCI 2009. OSCI TLM-2.0 Language Reference Manual. OSCI.
[20]
Marcel Pockrandt, Paula Herber, and Sabine Glesner. 2011. Model checking a System-C/TLM design of the AMBA AHB protocol. In 2011 9th IEEE Symposium on Embedded Systems for Real-Time Multimedia. 66--75.
[21]
Std. 1666 2011. IEEE Standard SystemC Language Reference Manual. Std. 1666.
[22]
D. Tabakov, M.Y. Vardi, G. Kamhi, and E. Singerman. 2008. A Temporal Language for SystemC. In FMCAD. 1--9.
[23]
C. Traulsen, J. Cornet, M. Moy, and F. Maraninchi. 2007. A SystemC/TLM Semantics in Promela and Its Possible Applications. In SPIN.
[24]
M. Y. Vardi. 2007. Formal techniques for SystemC verification. In DAC.
[25]
Andrew Waterman, Yunsup Lee, David A. Patterson, and Krste Asanovic. 2014. The RISC-V Instruction Set Manual.

Cited By

View all
  • (2024)VerificationFormal and Practical Techniques for the Complex System Design Process using Virtual Prototypes10.1007/978-3-031-51692-4_4(107-152)Online publication date: 26-Mar-2024
  • (2024)Hardware and Environment ModelingFormal and Practical Techniques for the Complex System Design Process using Virtual Prototypes10.1007/978-3-031-51692-4_3(21-106)Online publication date: 26-Mar-2024
  • (2024)IntroductionFormal and Practical Techniques for the Complex System Design Process using Virtual Prototypes10.1007/978-3-031-51692-4_1(1-11)Online publication date: 26-Mar-2024

Recommendations

Comments

Information & Contributors

Information

Published In

cover image ACM Conferences
DAC '22: Proceedings of the 59th ACM/IEEE Design Automation Conference
July 2022
1462 pages
ISBN:9781450391429
DOI:10.1145/3489517
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than the author(s) must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected].

Sponsors

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 23 August 2022

Permissions

Request permissions for this article.

Check for updates

Qualifiers

  • Research-article

Funding Sources

  • BMBF1
  • BMBF2

Conference

DAC '22
Sponsor:
DAC '22: 59th ACM/IEEE Design Automation Conference
July 10 - 14, 2022
California, San Francisco

Acceptance Rates

Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

Upcoming Conference

DAC '25
62nd ACM/IEEE Design Automation Conference
June 22 - 26, 2025
San Francisco , CA , USA

Contributors

Other Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

  • Downloads (Last 12 months)38
  • Downloads (Last 6 weeks)3
Reflects downloads up to 05 Mar 2025

Other Metrics

Citations

Cited By

View all
  • (2024)VerificationFormal and Practical Techniques for the Complex System Design Process using Virtual Prototypes10.1007/978-3-031-51692-4_4(107-152)Online publication date: 26-Mar-2024
  • (2024)Hardware and Environment ModelingFormal and Practical Techniques for the Complex System Design Process using Virtual Prototypes10.1007/978-3-031-51692-4_3(21-106)Online publication date: 26-Mar-2024
  • (2024)IntroductionFormal and Practical Techniques for the Complex System Design Process using Virtual Prototypes10.1007/978-3-031-51692-4_1(1-11)Online publication date: 26-Mar-2024

View Options

Login options

View options

PDF

View or Download as a PDF file.

PDF

eReader

View online with eReader.

eReader

Figures

Tables

Media

Share

Share

Share this Publication link

Share on social media