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Writing P4 compiler backend for packet processing engines

Published:18 January 2022Publication History

ABSTRACT

The advent of P4 as a protocol-independent and platform-independent network packet processing language has revolutionized the way networks are designed and the way networking devices are programmed. There are few programmable devices, whether ASICs or FPGA-based devices, that are designed with P4 programmability as the end goal right from the beginning. As a consequence, although these packet processing engines are programmable, writing a P4 compiler for these targets requires overcoming some technical challenges. Our team has worked on a variety of packet processing pipelines in recent years, in this article, we are presenting some of these challenges as well as the solutions we found to work around them.

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References

  1. The P4 Language Consortium. 2021. P416 Language Specification v1.2.2. https://p4.org/p4-spec/docs/P4-16-v1.2.2.htmlGoogle ScholarGoogle Scholar
  2. The P4 Language Consortium. 2021. P4_16 reference compiler code from https://github.com/p4lang/p4cGoogle ScholarGoogle Scholar
  3. The P4 Language Consortium. 2021. P4Runtime Specification. https://p4.org/p4-spec/p4runtime/v1.0.0/P4Runtime-Spec.html.Google ScholarGoogle Scholar

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  1. Writing P4 compiler backend for packet processing engines

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      • Published in

        cover image ACM Conferences
        ANCS '21: Proceedings of the Symposium on Architectures for Networking and Communications Systems
        December 2021
        174 pages
        ISBN:9781450391689
        DOI:10.1145/3493425

        Copyright © 2021 ACM

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        New York, NY, United States

        Publication History

        • Published: 18 January 2022

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