ABSTRACT
With the increasing acceptance of cloud computing in various fields, Field Programmable Gate Arrays(FPGA), as one of the core computing power due to its programmable, low power consumption and low characteristics, has been widely deployed in data center. Therefore, how to deploy and use FPGA devices in the cloud computing system of ultra large-scale data center has become a research topic for many units. Traditionally, the deployment of FPGA in the data center is directly inserted in the PCIE slot of server, which belongs to the FPGA-CPU binding method, and The number of FPGA boards supported by single host is limited by the server slot. We propose to change the CPU-FPGA mode by decoupling the FPGA from the CPU and connecting the FPGA to the data center network as an independent resource. This solution solves the scalability problem of FPGA deployment, making it easier for FPGA to deploy and schedule on a large scale. Based on the above FPGA, this paper proposes a solution for large-scale deployment of FPGA devices in kubernetes platform. The scheme adopts container based and kubernetes container deployment management technology. The experimental results proved that the prototype has good throughput, lower communication latency between cards and better scalability compared with the deployment in the way of PCIE.
- Yin Dong, Li Ge, Huang Ke-di. Scalable MapReduce Framework on FPGA Accelerated Commodity Hardware. in: Andreev S., Balandin S., Koucheryavy Y. (eds) Internet of Things, Smart Spaces, and Next Generation Networking. Lecture Notes in Computer Science, vol 7469. Berlin, Heidelberg: Springer, 2012. 280--294Google Scholar
- Jagath Weerasinghe, Francois Abel, Christoph Hagleitner et al. Enabling FPGAs in Hyperscale Data Centers. UIC-ATC-ScalCom-CBDCom-IoP 2015Google Scholar
- Ze-ke Wang, Zhang Shuhao, He Bingsheng, et al. Melia: A MapReduce Framework on OpenCL-Based FPGAs. IEEE Transactions on Parallel and Distributed Systems, 2016, 27(12): 3547--3560Google Scholar
- Kang D, Jun T J, Kim D, et al. ConVGPU: GPU Management Middleware in Container Based Virtualized Environment[C]//Cluster Computing (CLUSTER), 2017 IEEE International Conference on. IEEE, 2017: 301--309.Google Scholar
- Herrera A. NVIDIA GRID: Graphics accelerated VDI with the visual performance of a workstation[J]. Nvidia Corp, 2014.Google Scholar
- NVIDIA Docker. https://www.nvidia.cn/object/docker-containercn.html, accessed 2018-08-23.Google Scholar
- R. Brodersen, A. Tkachenko, and H. Kwok-Hay So. A unified hardware/software runtime environment for fpga-based reconfigurable computers using borph. In Hardware/Software Codesign and System Synthesis, 2006. CODES+ISSS '06. Proceedings of the 4th International Conference, pages 259--264, 2006.Google Scholar
- Christoforos Kachris, Dionysios Diamantopoulos, Georgios Ch. Sirakoulis, et al. An FPGA-based Integrated MapReduce Accelerator Platform. Signal Processing Systems, 2017, 87(3): 357--369Google Scholar
- Dionysios Diamantopoulos, Christoforos Kachris. High-level synthesizable dataflow MapReduce accelerator for FPGA-coupled data centers. in: International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation. Samos, Greece: IEEE, 2015. 26--33Google ScholarCross Ref
- Zhang C, Li P, Sun G, et al. Optimizing fpga-based accelerator design for deep convolutional neural networks. in: Proceedings o the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays. Monterey, CA, USA: ACM, 2015: 161--170Google ScholarDigital Library
- K. Eguro and R. Venkatesan. Fpgas for trusted cloud computing. In Field Programmable Logic and Applications (FPL), 2012 22nd International Conference on, pages 63--70, Aug 2012.Google ScholarCross Ref
- S. Byma et al., "FPGAs in the cloud: Booting virtualized hardware accelerators with openstack," in Proceedings of the 2014 IEEE 22Nd International Symposium on Field-Programmable Custom Computing Machines, ser. FCCM '14, 2014, pp. 109--116.Google Scholar
- F. Chen et al., "Enabling FPGAs in the cloud," in Proceedings of the 11th ACM Conference on Computing Frontiers, ser. CF '14. New York, NY, USA: ACM, 2014, pp. 3:1--3:10.Google ScholarDigital Library
- Li R, Kan H, Su D, et al. An Optimal Design Method of Conv2d Operator for TensorFlow Based on FPGA Accelerator[C]//Proceedings of the 4th International Conference on Computer Science and Application Engineering. 2020: 1--6.Google Scholar
- Kan H, Li R, Su D, et al. Trusted Edge Cloud Computing Mechanism Based on FPGA Cluster[C]//2020 IEEE 8th International Conference on Computer Science and Network Technology (ICCSNT). IEEE, 2020: 146--149.Google Scholar
Index Terms
- The deployment of FPGA Based on Network in Ultra-large-scale Data Center
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