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Heterogeneous Graph Neural Network-Based Imitation Learning for Gate Sizing Acceleration

Published: 22 December 2022 Publication History

Abstract

Gate Sizing is an important step in logic synthesis, where the cells are resized to optimize metrics such as area, timing, power, leakage, etc. In this work, we consider the gate sizing problem for leakage power optimization with timing constraints. Lagrangian Relaxation is a widely employed optimization method for gate sizing problems. We accelerate Lagrangian Relaxation-based algorithms by narrowing down the range of cells to resize. In particular, we formulate a heterogeneous directed graph to represent the timing graph, propose a heterogeneous graph neural network as the encoder, and train in the way of imitation learning to mimic the selection behavior of each iteration in Lagrangian Relaxation. This network is used to predict the set of cells that need to be changed during the optimization process of Lagrangian Relaxation. Experiments show that our accelerated gate sizer could achieve comparable performance to the baseline with an average of 22.5% runtime reduction.

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  • (2024)IR-Aware ECO Timing Optimization Using Reinforcement LearningProceedings of the 2024 ACM/IEEE International Symposium on Machine Learning for CAD10.1145/3670474.3685945(1-7)Online publication date: 9-Sep-2024
  • (2024)IR-Aware ECO Timing Optimization Using Reinforcement Learning2024 ACM/IEEE 6th Symposium on Machine Learning for CAD (MLCAD)10.1109/MLCAD62225.2024.10740227(1-7)Online publication date: 9-Sep-2024
  • (2024)An Optimization-Aware Pre-Routing Timing Prediction Framework Based on Heterogeneous Graph LearningProceedings of the 29th Asia and South Pacific Design Automation Conference10.1109/ASP-DAC58780.2024.10473937(177-182)Online publication date: 22-Jan-2024
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cover image ACM Conferences
ICCAD '22: Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design
October 2022
1467 pages
ISBN:9781450392174
DOI:10.1145/3508352
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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  • IEEE-EDS: Electronic Devices Society
  • IEEE CAS
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Published: 22 December 2022

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  • Hong Kong Innovation and Technology Fund Project

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ICCAD '22
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ICCAD '22: IEEE/ACM International Conference on Computer-Aided Design
October 30 - November 3, 2022
California, San Diego

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View all
  • (2024)IR-Aware ECO Timing Optimization Using Reinforcement LearningProceedings of the 2024 ACM/IEEE International Symposium on Machine Learning for CAD10.1145/3670474.3685945(1-7)Online publication date: 9-Sep-2024
  • (2024)IR-Aware ECO Timing Optimization Using Reinforcement Learning2024 ACM/IEEE 6th Symposium on Machine Learning for CAD (MLCAD)10.1109/MLCAD62225.2024.10740227(1-7)Online publication date: 9-Sep-2024
  • (2024)An Optimization-Aware Pre-Routing Timing Prediction Framework Based on Heterogeneous Graph LearningProceedings of the 29th Asia and South Pacific Design Automation Conference10.1109/ASP-DAC58780.2024.10473937(177-182)Online publication date: 22-Jan-2024
  • (2023)Graph Neural NetworksProceedings of the 28th Asia and South Pacific Design Automation Conference10.1145/3566097.3568345(83-90)Online publication date: 16-Jan-2023

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