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Fast and Compact Interleaved Modular Multiplication Based on Carry Save Addition

Authors:

Eduardo Chielle,

Michail ManiatakosAuthors Info & Claims

ICCAD '22: Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design

Article No.: 99, Pages 1 - 9

https://doi.org/10.1145/3508352.3549414

Published: 22 December 2022 Publication History

Abstract

Improving fully homomorphic encryption computation by designing specialized hardware is an active topic of research. The most prominent encryption schemes operate on long polynomials requiring many concurrent modular multiplications of very big numbers. Thus, it is crucial to use many small and efficient multipliers. Interleaved and Montgomery iterative multipliers are the best candidates for the task. Interleaved designs, however, suffer from longer latency as they require a number comparison within each iteration; Montgomery designs, on the other hand, need extra conversion of the operands or the result. In this work, we propose a novel hardware design that combines the best of both worlds: Exhibiting the carry save addition of Montgomery designs without the need for any domain conversions. Experimental results demonstrate improved latency-area product efficiency by up to 47% when compared to the standard Interleaved multiplier for large arithmetic word sizes.

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Cited By

Soni DNabeel MGamil HMazonka OReagen BKarri RManiatakos M(2023)Design Space Exploration of Modular Multipliers for ASIC FHE accelerators2023 24th International Symposium on Quality Electronic Design (ISQED)10.1109/ISQED57927.2023.10129292(1-8)Online publication date: 5-Apr-2023
https://doi.org/10.1109/ISQED57927.2023.10129292
Zhang JImani MSadredini E(2023)BP-NTT: Fast and Compact in-SRAM Number Theoretic Transform with Bit-Parallel Modular Multiplication2023 60th ACM/IEEE Design Automation Conference (DAC)10.1109/DAC56929.2023.10247691(1-6)Online publication date: 9-Jul-2023
https://doi.org/10.1109/DAC56929.2023.10247691

Index Terms

Fast and Compact Interleaved Modular Multiplication Based on Carry Save Addition
1. Computing methodologies
  1. Symbolic and algebraic manipulation
    1. Symbolic and algebraic algorithms
      1. Exact arithmetic algorithms
2. Hardware
  1. Integrated circuits
    1. Logic circuits
      1. Arithmetic and datapath circuits

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Published In

cover image ACM Conferences

ICCAD '22: Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design

October 2022

1467 pages

ISBN:9781450392174

DOI:10.1145/3508352

Conference Chair:
Tulika Mitra
National University of Singapore
,
Program Chairs:
Evangeline Young
The Chinese University of Hong Kong
,
Jinjun Xiong
University at Buffalo (UB)

Copyright © 2022 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than the author(s) must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected].

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 22 December 2022

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Author Tag

modular multiplication

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Research-article

Funding Sources

Defense Advanced Research Projects Agency

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ICCAD '22

Sponsor:

SIGDA

ICCAD '22: IEEE/ACM International Conference on Computer-Aided Design

October 30 - November 3, 2022

California, San Diego

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Cited By

Soni DNabeel MGamil HMazonka OReagen BKarri RManiatakos M(2023)Design Space Exploration of Modular Multipliers for ASIC FHE accelerators2023 24th International Symposium on Quality Electronic Design (ISQED)10.1109/ISQED57927.2023.10129292(1-8)Online publication date: 5-Apr-2023
https://doi.org/10.1109/ISQED57927.2023.10129292
Zhang JImani MSadredini E(2023)BP-NTT: Fast and Compact in-SRAM Number Theoretic Transform with Bit-Parallel Modular Multiplication2023 60th ACM/IEEE Design Automation Conference (DAC)10.1109/DAC56929.2023.10247691(1-6)Online publication date: 9-Jul-2023
https://doi.org/10.1109/DAC56929.2023.10247691

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