research-article

Graph Neural Networks for Idling Error Mitigation

Authors:

Vedika Saravanan,

Samah Mohamed SaeedAuthors Info & Claims

ICCAD '22: Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design

Article No.: 139, Pages 1 - 9

https://doi.org/10.1145/3508352.3549444

Published: 22 December 2022 Publication History

Abstract

Dynamical Decoupling (DD)-based protocols have been shown to reduce the idling errors encountered in quantum circuits. However, the current research in suppressing idling qubit errors suffers from scalability issues due to the large number of tuning quantum circuits that should be executed first to find the locations of the DD sequences in the target quantum circuit, which boost the output state fidelity. This process becomes tedious as the size of the quantum circuit increases. To address this challenge, we propose a Graph Neural Network (GNN) framework, which mitigates idling errors through an efficient insertion of DD sequences into quantum circuits by modeling their impact at different idle qubit windows. Our paper targets maximizing the benefit of DD sequences using a limited number of tuning circuits. We propose to classify the idle qubit windows into critical and non-critical (benign) windows using a data-driven reliability model. Our results obtained from IBM Lagos quantum computer show that our proposed GNN models, which determine the locations of DD sequences in the quantum circuits, significantly improve the output state fidelity by a factor of 1.4x on average and up to 2.6x compared to the adaptive DD approach, which searches for the best locations of DD sequences at run-time.

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Cited By

Charrwi MIoannou GYounis Ede Jong WSaeed S(2024)Quantum Circuit Partitioning for Scalable Noise-Aware Quantum Circuit Re-Synthesis2024 IEEE International Conference on Quantum Computing and Engineering (QCE)10.1109/QCE60285.2024.10306(359-364)Online publication date: 15-Sep-2024
https://doi.org/10.1109/QCE60285.2024.10306
Ioannou GKizhuvettil GCharrwi MSaeed S(2024)Can ML-Based Reliability Models Span Quantum Hardware Boundaries?2024 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)10.1109/ISVLSI61997.2024.00115(607-612)Online publication date: 1-Jul-2024
https://doi.org/10.1109/ISVLSI61997.2024.00115
Saravanan VMohamed Saeed S(2023)Machine Learning Reliability Assessment from Application to Pulse LevelQuantum Computing10.1007/978-3-031-37966-6_7(121-140)Online publication date: 7-Aug-2023
https://doi.org/10.1007/978-3-031-37966-6_7

Index Terms

Graph Neural Networks for Idling Error Mitigation

Index terms have been assigned to the content through auto-classification.

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cover image ACM Conferences

ICCAD '22: Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design

October 2022

1467 pages

ISBN:9781450392174

DOI:10.1145/3508352

Conference Chair:
Tulika Mitra
National University of Singapore
,
Program Chairs:
Evangeline Young
The Chinese University of Hong Kong
,
Jinjun Xiong
University at Buffalo (UB)

Copyright © 2022 ACM.

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Published: 22 December 2022

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ICCAD '22: IEEE/ACM International Conference on Computer-Aided Design

October 30 - November 3, 2022

California, San Diego

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Cited By

Charrwi MIoannou GYounis Ede Jong WSaeed S(2024)Quantum Circuit Partitioning for Scalable Noise-Aware Quantum Circuit Re-Synthesis2024 IEEE International Conference on Quantum Computing and Engineering (QCE)10.1109/QCE60285.2024.10306(359-364)Online publication date: 15-Sep-2024
https://doi.org/10.1109/QCE60285.2024.10306
Ioannou GKizhuvettil GCharrwi MSaeed S(2024)Can ML-Based Reliability Models Span Quantum Hardware Boundaries?2024 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)10.1109/ISVLSI61997.2024.00115(607-612)Online publication date: 1-Jul-2024
https://doi.org/10.1109/ISVLSI61997.2024.00115
Saravanan VMohamed Saeed S(2023)Machine Learning Reliability Assessment from Application to Pulse LevelQuantum Computing10.1007/978-3-031-37966-6_7(121-140)Online publication date: 7-Aug-2023
https://doi.org/10.1007/978-3-031-37966-6_7

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