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Garbled EDA: Privacy Preserving Electronic Design Automation

Published: 22 December 2022 Publication History

Abstract

The complexity of modern integrated circuits (ICs) necessitates collaboration between multiple distrusting parties, including third-party intellectual property (3PIP) vendors, design houses, CAD/EDA tool vendors, and foundries, which jeopardizes confidentiality and integrity of each party's IP. IP protection standards and the existing techniques proposed by researchers are ad hoc and vulnerable to numerous structural, functional, and/or side-channel attacks. Our framework, Garbled EDA, proposes an alternative direction through formulating the problem in a secure multi-party computation setting, where the privacy of IPs, CAD tools, and process design kits (PDKs) is maintained. As a proof-of-concept, Garbled EDA is evaluated in the context of simulation, where multiple IP description formats (Verilog, C, S) are supported. Our results demonstrate a reasonable logical-resource cost and negligible memory overhead. To further reduce the overhead, we present another efficient implementation methodology, feasible when the resource utilization is a bottleneck, but the communication between two parties is not restricted. Interestingly, this implementation is private and secure even in the presence of malicious adversaries attempting to, e.g., gain access to PDKs or in-house IPs of the CAD tool providers.

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Cited By

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  • (2025)DEFending Integrated Circuit LayoutsIEEE Transactions on Information Forensics and Security10.1109/TIFS.2024.349281020(46-59)Online publication date: 1-Jan-2025
  • (2024)Poster: BlindMarket: A Trustworthy Chip Designs Marketplace for IP Vendors and UsersProceedings of the 2024 on ACM SIGSAC Conference on Computer and Communications Security10.1145/3658644.3691378(5048-5050)Online publication date: 2-Dec-2024
  • (2023)ActiWate: Adaptive and Design-agnostic Active Watermarking for IP Ownership in Modern SoCs2023 60th ACM/IEEE Design Automation Conference (DAC)10.1109/DAC56929.2023.10247688(1-6)Online publication date: 9-Jul-2023

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cover image ACM Conferences
ICCAD '22: Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design
October 2022
1467 pages
ISBN:9781450392174
DOI:10.1145/3508352
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 22 December 2022

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ICCAD '22: IEEE/ACM International Conference on Computer-Aided Design
October 30 - November 3, 2022
California, San Diego

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Cited By

View all
  • (2025)DEFending Integrated Circuit LayoutsIEEE Transactions on Information Forensics and Security10.1109/TIFS.2024.349281020(46-59)Online publication date: 1-Jan-2025
  • (2024)Poster: BlindMarket: A Trustworthy Chip Designs Marketplace for IP Vendors and UsersProceedings of the 2024 on ACM SIGSAC Conference on Computer and Communications Security10.1145/3658644.3691378(5048-5050)Online publication date: 2-Dec-2024
  • (2023)ActiWate: Adaptive and Design-agnostic Active Watermarking for IP Ownership in Modern SoCs2023 60th ACM/IEEE Design Automation Conference (DAC)10.1109/DAC56929.2023.10247688(1-6)Online publication date: 9-Jul-2023

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