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2022 CAD Contest Problem A: Learning Arithmetic Operations from Gate-Level Circuit

Published: 22 December 2022 Publication History

Abstract

Extracting circuit functionality from a gate-level netlist is critical in CAD tools. For security, it helps designers to detect hardware Trojans or malicious design changes in the netlist with third-party resources such as fabrication services and soft/hard IP cores. For verification, it can reduce the complexity and effort of keeping design information in aggressive optimization strategies adopted by synthesis tools. For Engineering Change Order (ECO), it can keep the designer from locating the ECO gate in a sea of bit-level gates.
In this contest, we formulated a datapath learning and extraction problem. With a set of benchmarks and an evaluation metric, we expect contestants to develop a tool to learn the arithmetic equations from a synthesized gate-level netlist.

References

[1]
T. Meade, S. Zhang, and Y. Jin, "Netlist Reverse Engineering for High-Level Functionality Reconstruction," in ASP-DAC, 2016, pp. 655--660.
[2]
P. Subramanyan, N. Tsiskaridze, K. Pasricha, D. Reisman, A. Susnea, and S. Malik, "Reverse engineering digital circuits using functional analysis," in the Proc. of IEEE/ACM Design Automation and Test in Europe, 2013.
[3]
W. Li, Z. Wasson, and S. A. Seshia, "Reverse engineering circuits using behavioral pattern mining," in the Proc. of IEEE International Symposium on Hardware-Oriented Security and Trust, pp. 83--88, 2012.
[4]
W. Li, A. Gascon, P. Subramanyan, W. Y. Tan, A. Tiwari, S. Malik, N. Shankar, and S. A. Seshia, "WordRev: Finding word-level structures in a sea of bit-level gates," in Hardware-Oriented Security and Trust, 2013, pp. 67--74.
[5]
M. Fyrbiak, S. Wallat, P. Swierczynski, M. Hoffmann, S. Hoppach, M. Wilhelm, T. Weidlich, R. Tessier, and C. Paar, "HAL---The missing piece of the puzzle for hardware reverse engineering, Trojan detection and insertion," IEEE Trans. Depend. Secure Comput. 16, 3 (2018), 498--510.
[6]
Z. Huang, Q. Wang, Y. Chen, and X. Jiang, "A survey on machine learning against hardware trojan attacks: Recent advances and challenges," IEEE Access, vol. 8, pp. 10796--10826, 2020.
[7]
Y. Yang, J. Ye, Y. Cao, J. Zhang, X. Li, H. Li, and Y. Hu, "Survey: Hardware Trojan Detection for Netlist," in IEEE 29th Asian Test Symposium, pp. 1--6. IEEE, 2020.
[8]
C. Yu, X. Zhang, D. Liu, M. Ciesielski, and D. Holcomb, "Incremental SAT-based reverse engineering of camouflaged logic circuits," IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., vol. 36, no. 10, pp. 1647--1659, Oct. 2017.
[9]
M. Rostami, F. Koushanfar, and R. Karri, "A primer on hardware security: Models, methods, and metrics," Proc. IEEE, vol. 102, no. 8, pp. 1283--1295, Aug. 2014.
[10]
IEEE Standard Verilog® Hardware Description Language
[11]
ICCAD contest 2022, http://iccad-contest.org/tw/index.html

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cover image ACM Conferences
ICCAD '22: Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design
October 2022
1467 pages
ISBN:9781450392174
DOI:10.1145/3508352
Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for third-party components of this work must be honored. For all other uses, contact the Owner/Author.

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  • IEEE-EDS: Electronic Devices Society
  • IEEE CAS
  • IEEE CEDA

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 22 December 2022

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  1. arithmetic operation extraction
  2. datapath extraction

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  • Invited-talk

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ICCAD '22
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ICCAD '22: IEEE/ACM International Conference on Computer-Aided Design
October 30 - November 3, 2022
California, San Diego

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Overall Acceptance Rate 457 of 1,762 submissions, 26%

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