research-article

TCPS: a task and cache-aware partitioned scheduler for hard real-time multi-core systems

Authors:

Andy D. PimentelAuthors Info & Claims

LCTES 2022: Proceedings of the 23rd ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems

Pages 37 - 49

https://doi.org/10.1145/3519941.3535067

Published: 14 June 2022 Publication History

Abstract

Shared caches in multi-core processors seriously complicate the timing verification of real-time software tasks due to the task interference occurring in the shared caches. Explicitly calculating the amount of cache interference among tasks and cache partitioning are two major approaches to enhance the schedulability performance in the context of multi-core processors with shared caches. The former approach suffers from pessimistic cache interference estimations that subsequently result in suboptimal schedulability performance, whereas the latter approach may increase the execution time of tasks due to a lower cache usage, also degrading the schedulability performance.

In this paper, we propose a heuristic partitioned scheduler, called TCPS, for real-time non-preemptive multi-core systems with partitioned caches. To achieve a high degree of schedulability, TCPS combines the benefits of partitioned scheduling, relieving the computing resources from contention, and cache partitioning, mitigating cache interference, in conjunction with exploiting task characteristics. A series of comprehensive experiments were performed to evaluate the schedulability performance of TCPS and compare it against a variety of global and partitioned scheduling approaches. Our results show that TCPS outperforms all of these scheduling techniques in terms of schedulability, and yields a more effective cache usage and more stable load balancing.

References

[1]

Karsten Albers and Frank Slomka. 2004. An event stream driven approximation for the analysis of real-time systems. In Proceedings. 16th Euromicro Conference on Real-Time Systems, 2004. ECRTS 2004. 187–195. https://doi.org/10.1109/EMRTS.2004.1311020

[2]

Sebastian Altmeyer, Roeland Douma, Will Lunniss, and Robert I Davis. 2014. Outstanding paper: Evaluation of cache partitioning for hard real-time systems. In 2014 26th Euromicro Conference on Real-Time Systems. 15–26. https://doi.org/10.1109/ECRTS.2014.11

Digital Library

[3]

Rimmi Anand, Divya Aggarwal, and Vijay Kumar. 2017. A comparative analysis of optimization solvers. Journal of Statistics and Management Systems, 20, 4 (2017), 623–635. https://doi.org/10.1080/09720510.2017.1395182

[4]

Sanjoy Baruah. 2007. Techniques for multiprocessor global schedulability analysis. In 28th IEEE International Real-Time Systems Symposium (RTSS 2007). 119–128. https://doi.org/10.1109/RTSS.2007.35

Digital Library

[5]

Sanjoy Baruah. 2013. Partitioned EDF scheduling: a closer look. Real-Time Systems, 49, 6 (2013), 715–729. https://doi.org/10.1007/s11241-013-9186-0

Digital Library

[6]

Sanjoy Baruah and Alan Burns. 2006. Sustainable Scheduling Analysis. In 2006 27th IEEE International Real-Time Systems Symposium (RTSS’06). 159–168. https://doi.org/10.1109/RTSS.2006.47

Digital Library

[7]

Sanjoy Baruah and Nathan Fisher. 2005. The partitioned multiprocessor scheduling of sporadic task systems. In 26th IEEE International Real-Time Systems Symposium (RTSS’05). 9–pp. https://doi.org/10.1109/RTSS.2005.40

Digital Library

[8]

Sanjoy K Baruah, Aloysius K Mok, and Louis E Rosier. 1990. Preemptively scheduling hard-real-time sporadic tasks on one processor. In [1990] Proceedings 11th Real-Time Systems Symposium. 182–190. https://doi.org/10.1109/REAL.1990.128746

[9]

Marko Bertogna, Michele Cirinei, and Giuseppe Lipari. 2008. Schedulability analysis of global scheduling algorithms on multiprocessor platforms. IEEE Transactions on parallel and distributed systems, 20, 4 (2008), 553–566. https://doi.org/10.1109/TPDS.2008.129

Digital Library

[10]

Björn B Brandenburg and Mahircan Gül. 2016. Global scheduling not required: Simple, near-optimal multiprocessor real-time scheduling with semi-partitioned reservations. In 2016 IEEE Real-Time Systems Symposium (RTSS). 99–110. https://doi.org/10.1109/RTSS.2016.019

[11]

Kenneth L Clarkson. 1995. Las Vegas algorithms for linear and integer programming when the dimension is small. Journal of the ACM (JACM), 42, 2 (1995), 488–499. https://doi.org/10.1.1.94.5589

Digital Library

[12]

Henry Cook, Miquel Moreto, Sarah Bird, Khanh Dao, David A Patterson, and Krste Asanovic. 2013. A hardware evaluation of cache partitioning to improve utilization and energy-efficiency while preserving responsiveness. ACM SIGARCH Computer Architecture News, 41, 3 (2013), 308–319. https://doi.org/10.1145/2485922.2485949

Digital Library

[13]

Robert I Davis and Alan Burns. 2011. A survey of hard real-time scheduling for multiprocessor systems. ACM computing surveys (CSUR), 43, 4 (2011), 1–44. https://doi.org/10.1145/1978802.1978814

Digital Library

[14]

Casini Daniel et al. 2017. Semi-partitioned scheduling of dynamic real-time workload: A practical approach based on analysis-driven load balancing. In 29th Euromicro Conference on Real-Time Systems (ECRTS 2017). https://doi.org/10.4230/LIPIcs.ECRTS.2017.0

[15]

Liedtke Jochen et al. 1997. OS-controlled cache predictability for real-time systems. In Proceedings Third IEEE Real-Time Technology and Applications Symposium. 213–224. https://doi.org/10.1109/TCAD.2018.2857079

[16]

Yang Maolin et al. 2018. Resource-oriented partitioning for multiprocessor systems with shared resources. IEEE Trans. Comput., 68, 6 (2018), 882–898. https://doi.org/10.1109/TC.2018.2889985

Digital Library

[17]

Heiko Falk, Sebastian Altmeyer, Peter Hellinckx, Björn Lisper, Wolfgang Puffitsch, Christine Rochange, Martin Schoeberl, Rasmus Bo Sørensen, Peter Wägemann, and Simon Wegener. 2016. TACLeBench: A benchmark collection to support worst-case execution time research. In 16th International Workshop on Worst-Case Execution Time Analysis. https://doi.org/10.4230/OASIcs.WCET.2016.2

[18]

Nathan Fisher and Sanjoy Baruah. 2006. The partitioned multiprocessor scheduling of non-preemptive sporadic task systems. In 14th International conference on real-time and network systems. https://doi.org/10.1109/TC.2006.113

Digital Library

[19]

Giovani Gracioli and Antônio Augusto Fröhlich. 2013. An experimental evaluation of the cache partitioning impact on multicore real-time schedulers. In 2013 IEEE 19th International Conference on Embedded and Real-Time Computing Systems and Applications. 72–81. https://doi.org/10.1109/RTCSA.2013.6732205

[20]

Jan Gustafsson, Adam Betts, Andreas Ermedahl, and Björn Lisper. 2010. The Mälardalen WCET benchmarks: Past, present and future. In 10th International Workshop on Worst-Case Execution Time Analysis (WCET 2010). https://doi.org/10.4230/OASIcs.WCET.2010.136

[21]

Damien Hardy, Benjamin Rouxel, and Isabelle Puaut. 2017. The heptane static worst-case execution time estimation tool. In 17th International Workshop on Worst-Case Execution Time Analysis (WCET 2017). https://doi.org/10.4230/OASIcs.WCET.2017.8

[22]

Wen-Hung Huang, Jian-Jia Chen, Husheng Zhou, and Cong Liu. 2015. PASS: Priority assignment of real-time tasks with dynamic suspending behavior under fixed-priority scheduling. In 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC). 1–6. https://doi.org/10.1145/2744769.2744891

Digital Library

[23]

Shinpei Kato and Nobuyuki Yamasaki. 2009. Semi-partitioned fixed-priority scheduling on multiprocessors. In 2009 15th IEEE Real-Time and Embedded Technology and Applications Symposium. 23–32. https://doi.org/10.1109/RTAS.2009.9

Digital Library

[24]

Hyoseung Kim, Arvind Kandhalu, and Ragunathan Rajkumar. 2013. A coordinated approach for practical OS-level cache management in multi-core real-time systems. In 2013 25th Euromicro Conference on Real-Time Systems. 80–89. https://doi.org/10.1109/ECRTS.2013.19

Digital Library

[25]

Jinkyu Lee, Kang G Shin, Insik Shin, and Arvind Easwaran. 2014. Composition of schedulability analyses for real-time multiprocessor systems. IEEE Trans. Comput., 64, 4 (2014), 941–954. https://doi.org/10.1109/TC.2014.2308183

Digital Library

[26]

S. Lloyd. 1982. Least squares quantization in PCM. IEEE Transactions on Information Theory, 28, 2 (1982), 129–137. https://doi.org/10.1109/TIT.1982.1056489

Digital Library

[27]

Renato Mancuso, Roman Dudko, Emiliano Betti, Marco Cesati, Marco Caccamo, and Rodolfo Pellizzoni. 2013. Real-time cache management framework for multi-core architectures. In 2013 IEEE 19th Real-Time and Embedded Technology and Applications Symposium (RTAS). 45–54. https://doi.org/10.1109/RTAS.2013.6531078

Digital Library

[28]

Hemendra Singh Negi, Tulika Mitra, and Abhik Roychoudhury. 2003. Accurate estimation of cache-related preemption delay. In Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis. 201–206. https://doi.org/10.1109/TCAD.2018.2857079

[29]

Marco Paolieri, Eduardo Quiñones, Francisco J Cazorla, Robert I Davis, and Mateo Valero. 2011. IA\^ 3: An interference aware allocation algorithm for multicore hard real-time systems. In IEEE Real-Time and Embedded Technology and Applications Symposium. 280–290. https://doi.org/10.1109/RTAS.2011.34

Digital Library

[30]

Anuj Pathania and Jörg Henkel. 2018. HotSniper: Sniper-based toolchain for many-core thermal simulations in open systems. IEEE Embedded Systems Letters, 11, 2 (2018), 54–57. https://doi.org/10.1109/LES.2018.2866594

[31]

Vicent Selfa, Julio Sahuquillo, Lieven Eeckhout, Salvador Petit, and María E Gómez. 2017. Application clustering policies to address system fairness with intel’s cache allocation technology. In 2017 26th international conference on parallel architectures and compilation techniques (pact). 194–205. https://doi.org/10.1109/PACT.2017.19

[32]

M Naeem Shehzad, AM Deplanche, Yvon Trinquet, and Umer Farooq. 2014. Efficient data generation for the testing of real-time multiprocessor scheduling algorithms. Prz. Elektrotechniczny, 90 (2014), https://doi.org/10.12915/pe.2014.09.36

[33]

Mayank Shekhar, Abhik Sarkar, Harini Ramaprasad, and Frank Mueller. 2012. Semi-partitioned hard-real-time scheduling under locked cache migration in multicore systems. In 2012 24th Euromicro Conference on Real-Time Systems. 331–340. https://doi.org/10.1109/ECRTS.2012.27

Digital Library

[34]

Vivy Suhendra and Tulika Mitra. 2008. Exploring locking & partitioning for predictable shared caches on multi-cores. In Proceedings of the 45th annual Design Automation Conference. 300–303. https://doi.org/10.1145/1391469.1391545

Digital Library

[35]

Bryan C Ward, Jonathan L Herman, Christopher J Kenna, and James H Anderson. 2013. Outstanding paper award: Making shared caches more predictable on multicore platforms. In 2013 25th Euromicro Conference on Real-Time Systems. 157–167. https://doi.org/10.1109/ECRTS.2013.26

Digital Library

[36]

Reinhard Wilhelm, Jakob Engblom, Andreas Ermedahl, Niklas Holsti, Stephan Thesing, David Whalley, Guillem Bernat, Christian Ferdinand, Reinhold Heckmann, and Tulika Mitra. 2008. The worst-case execution-time problem—-overview of methods and survey of tools. ACM Transactions on Embedded Computing Systems (TECS), 7, 3 (2008), 1–53. https://doi.org/10.1145/1347375.1347389

Digital Library

[37]

Jun Xiao, Sebastian Altmeyer, and Andy Pimentel. 2017. Schedulability Analysis of Non-preemptive Real-Time Scheduling for Multicore Processors with Shared Caches. In 2017 IEEE Real-Time Systems Symposium (RTSS). 199–208. https://doi.org/10.1109/RTSS.2017.00026

[38]

Jun Xiao, Sebastian Altmeyer, and Andy D. Pimentel. 2020. Schedulability Analysis of Global Scheduling for Multicore Systems With Shared Caches. IEEE Trans. Comput., 69, 10 (2020), 1487–1499. https://doi.org/10.1109/TC.2020.2974224

[39]

Jun Xiao, Yixian Shen, and Andy D Pimentel. 2021. Cache Interference-aware Task Partitioning for Non-preemptive Real-time Multi-core Systems. ACM Transactions on Embedded Computing Systems (TECS), https://doi.org/10.1145/3487581

Digital Library

[40]

Meng Xu, Linh Thi Xuan Phan, Hyon-Young Choi, Yuhan Lin, Haoran Li, Chenyang Lu, and Insup Lee. 2019. Holistic resource allocation for multicore real-time systems. In 2019 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS). 345–356. https://doi.org/10.1109/RTAS.2019.00036

Cited By

Liu SMa JZhang ZWan XZhao BWu W(2025)Scalpel: High Performance Contention-Aware Task Co-Scheduling for Shared Cache HierarchyIEEE Transactions on Computers10.1109/TC.2024.350038174:2(678-690)Online publication date: 1-Feb-2025
https://dl.acm.org/doi/10.1109/TC.2024.3500381
Sun BKloda TGarcia SGracioli GCaccamo M(2024)Minimizing cache usage with fixed-priority and earliest deadline first schedulingReal-Time Systems10.1007/s11241-024-09423-760:4(625-664)Online publication date: 28-Jun-2024
https://dl.acm.org/doi/10.1007/s11241-024-09423-7
Yang YZhang NYan DWei XZhou JLiu HChen M(2023)Brief Industry Paper: Towards Efficient Task Scheduling for AUTOSAR using Parallel Pruning2023 IEEE Real-Time Systems Symposium (RTSS)10.1109/RTSS59052.2023.00057(484-488)Online publication date: 5-Dec-2023
https://doi.org/10.1109/RTSS59052.2023.00057

Index Terms

TCPS: a task and cache-aware partitioned scheduler for hard real-time multi-core systems
1. Computer systems organization
  1. Embedded and cyber-physical systems
    1. Embedded systems
      1. Embedded software

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cover image ACM Conferences

LCTES 2022: Proceedings of the 23rd ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems

June 2022

161 pages

ISBN:9781450392662

DOI:10.1145/3519941

General Chair:
Tobias Grosser
University of Edinburgh, UK
,
Program Chair:
Kyoungwoo Lee
Yonsei University, South Korea

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Published: 14 June 2022

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June 14, 2022

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Cited By

Liu SMa JZhang ZWan XZhao BWu W(2025)Scalpel: High Performance Contention-Aware Task Co-Scheduling for Shared Cache HierarchyIEEE Transactions on Computers10.1109/TC.2024.350038174:2(678-690)Online publication date: 1-Feb-2025
https://dl.acm.org/doi/10.1109/TC.2024.3500381
Sun BKloda TGarcia SGracioli GCaccamo M(2024)Minimizing cache usage with fixed-priority and earliest deadline first schedulingReal-Time Systems10.1007/s11241-024-09423-760:4(625-664)Online publication date: 28-Jun-2024
https://dl.acm.org/doi/10.1007/s11241-024-09423-7
Yang YZhang NYan DWei XZhou JLiu HChen M(2023)Brief Industry Paper: Towards Efficient Task Scheduling for AUTOSAR using Parallel Pruning2023 IEEE Real-Time Systems Symposium (RTSS)10.1109/RTSS59052.2023.00057(484-488)Online publication date: 5-Dec-2023
https://doi.org/10.1109/RTSS59052.2023.00057

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