research-article

A Novel Highly-Efficient Inexact Full Adder Cell for Motion and Edge Detection Systems of Image Processing in CNFET Technology

Authors:

Yavar Safaei Mehrabani,

Samaneh Goldani Gigasari,

Mohammad Mirzaei,

Hamidreza UoosefianAuthors Info & Claims

ACM Journal of Emerging Technologies in Computing System, Volume 18, Issue 4

Article No.: 74, Pages 1 - 20

https://doi.org/10.1145/3524061

Published: 27 October 2022 Publication History

Abstract

In this paper, a novel and highly efficient inexact Full Adder cell by exploiting two logic styles including conventional CMOS (C-COMS) and pass transistor logic (PTL) are presented. The so-called carbon nanotube field-effect transistor (CNFET) technology is used to implement circuits at the transistor level. To justify the efficiency of our design, extensive simulations are performed at the transistor level as well as application level. Transistor-level simulations which are carried out by the HSPICE 2008 tool, demonstrate at least 12% higher performance in terms of power-delay-area product (PDAP) of the proposed circuit compared to the latest designs. At the application level, by using the MATLAB tool, inexact Full Adders are employed in the structure of the ripple carry adder (RCA) that is applied in motion and edge detection algorithms. Computer simulation results confirm the appropriate quality of the output images in terms of the peak signal-to-noise ratio (PSNR) and structural similarity (SSIM) criteria. At last, to make a compromise between hardware and application level parameters, the power-delay-area-1/PSNR product (PDAPP) and power-delay-area-1/SSIM product (PDASP) are considered as figures of merit. The proposed circuit shows remarkable improvement from the PDAPP and PDASP points of view compared to its counterparts.

References

[1]

S. Das, P. Dasgupta, P. Fiser, S. Ghosh, and D. K. Das. 2016. A rule-based approach for minimizing power dissipation of digital circuits. In 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). 1–6, DOI:

[2]

M. Sasikala and D. G. K. D. P. Venkatesan. 2014. Design of low power approximate mirror adder. IJREAT: International Journal of Research in Engineering & Advanced Technology 2, 2 (2014), 6.

[3]

T. Yang, T. Ukezono, and T. Sato. 2018. A low-power configurable adder for approximate applications. In 2018 19th International Symposium on Quality Electronic Design (ISQED). IEEE, 347–352.

[4]

H. Uoosefian, K. Navi, R. Faghih Mirzaee, and M. Hosseinzadeh. 2020. High-performance CML approximate full adders for image processing application of Laplace transform. Circuit World 2020.

[5]

L. Sekanina, Z. Vasicek, and V. Mrazek. 2017. Approximate circuits in low-power image and video processing: The approximate median filter. Radioengineering 26, 3 (2017).

[6]

Y. Safaei Mehrabani and M. Eshghi. 2016. Noise and process variation tolerant, low-power, high-speed, and low-energy full adders in CNFET technology. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24, 11 (2016), 3268–3281.

Digital Library

[7]

S. Jaiswal, A. Khan, and S. Wairya. 2020. Design and performance evaluation of highly efficient adders in nanometer technology. In Advances in VLSI, Communication, and Signal Processing. Springer, 251–261.

[8]

Y. Safaei Mehrabani, R. Faghih Mirzaee, Z. Zareei, and S. M. Daryabari. 2017. A novel high-speed, low-power CNTFET-based inexact full adder cell for image processing application of motion detector. Journal of Circuits, Systems and Computers 26, 5 (2017), 1750082.

[9]

H. Jiang, J. Han, and F. Lombardi. 2015. A comparative review and evaluation of approximate adders. In Proceedings of the 25th Edition on Great Lakes Symposium on VLSI. ACM, 343–348.

Digital Library

[10]

H. Uoosefian, K. Navi, R. F. Mirzaee, and M. Hosseinzadeh. 2020. Two novel current-mode CNFET-based full adders using ULPD as voltage regulator. Journal of Circuits, Systems and Computers. (2020), 2150101.

[11]

Y. Safaei Mehrabani and M. Eshghi. 2015. High-speed, high-frequency and low-PDP, CNFET full adder cells. Journal of Circuits, Systems and Computers 24, 9 (2015), 1550130.

[12]

Y. Safaei Mehrabani and M. Eshghi. 2015. A symmetric, multi-threshold, high-speed and efficient-energy 1-bit full adder cell design using CNFET technology. Circuits, Systems, and Signal Processing 34, 3 (2015), 739–759.

Digital Library

[13]

D. Rostami, M. Eshghi, and Y. Safaei Mehrabani. 2020. Low-power and high-speed approximate 4: 2 compressors for image multiplication applications in CNFETs. International Journal of Electronics. 2020.

[14]

J. Liang, J. Han, and F. Lombardi. 2012. New metrics for the reliability of approximate and probabilistic adders. IEEE Transactions on Computers 62, 9 (2012), 1760–1771.

Digital Library

[15]

T. Zhang, W. Liu, J. Han, and F. Lombardi. 2019. Design and analysis of majority logic based approximate radix-4 booth encoders. In 2019 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH). IEEE, 1–6.

[16]

R. Ataie, A. A. Emrani Zarandi, and Y. Safaei Mehrabani. 2019. An efficient inexact full adder cell design in CNFET technology with high-PSNR for image processing. International Journal of Electronics 106, 6 (2019), 928–944.

[17]

H. T. Tari, A. D. Zarandi, and M. R. Reshadinezhad. 2019. Design of a high performance CNTFET-based full adder cell applicable in: Carry ripple, carry select and carry skip adders. Microelectronic Engineering 215, (2019), 110980.

Digital Library

[18]

Z. Yang, J. Han, and F. Lombardi. 2015. Transmission gate-based approximate adders for inexact computing. In Nanoscale Architectures (NANOARCH), 2015 IEEE/ACM International Symposium on. IEEE, 145–150.

[19]

C. Goyal, J. S. Ubhi, and B. Raj. 2019. A low leakage TG-CNTFET–based inexact full adder for low power image processing applications. International Journal of Circuit Theory and Applications 47, 9 (2019), 1446–1458.

[20]

M. Mirzaei and S. Mohammadi. 2020. Process variation-aware approximate full adders for imprecision-tolerant applications. Computers & Electrical Engineering 87, (2020), 106761.

[21]

J. Deng and H.-S. P. Wong. 2007. Device Modeling and Circuit pPerformance Evaluation for Nano-scale Devices: Silicon Technology Beyond 45 nm Node and Carbon Nanotube Field Effect Transistors, Ph.D. Thesis, Stanford University,” Ph.D., Stanford University, 2007.

[22]

Stanford University CNFET Model, available at https://nano.stanford.edu/stanford-cnfet-model.

[23]

J. Deng and H.-S. P. Wong. 2007. A compact SPICE model for carbon-nanotube field-effect transistors including nonidealities and its application—Part II: Full device model and circuit performance benchmarking. IEEE Transactions on Electron Devices 54, 12 (2007), 3195–3205.

[24]

J. Deng and H.-S. P. Wong. 2007. A compact SPICE model for carbon-nanotube field-effect transistors including nonidealities and its application—Part I: Model of the intrinsic channel region. IEEE Transactions on Electron Devices 54, 12 (2007), 3186–3194.

[25]

A. Shehu, A. Hulaj, and X. Bajrami. 2017. An algorithm for edge detection of the image for application in WSN. In International Conference on Applied Physics, System Science and Computers. Springer, 207–213.

[26]

A. Amirany, M. H. Moaiyeri, and K. Jafari. 2019. Process-in-memory using a magnetic-tunnel-junction synapse and a neuron based on a carbon nanotube field-effect transistor. IEEE Magnetics Letters 10 (2019), 1–5.

[27]

A. Amirany, M. H. Moaiyeri, and K. Jafari. 2020. Nonvolatile associative memory design based on spintronic synapses and CNTFET neurons. IEEE Transactions on Emerging Topics in Computing (2020). DOI:

[28]

A. Amirany, F. Marvi, K. Jafari, and R. Rajaei. 2019. Nonvolatile spin-based radiation hardened retention latch and flip-flop. IEEE Transactions on Nanotechnology 18 (2019), 1089–1096.

Digital Library

[29]

Z. Wang, A. C. Bovik, H. R. Sheikh, and E. P. Simoncelli. 2004. Image quality assessment: From error visibility to structural similarity. IEEE Transactions on Image Processing 13, 4 (2004), 600–612.

Digital Library

[30]

G. Cho, Y. Kim, and F. Lombardi. 2009. Assessment of CNTFET based circuit performance and robustness to PVT variations. 52nd IEEE International Midwest Symposium on Circuits and Systems, Cancun. 1106–1109.

[31]

K. El Shabrawy, K. Maharatna, D. Bagnall, and B. M. Al-Hashimi. 2010. Modeling SWCNT bandgap and effective mass variation using a Monte Carlo approach. IEEE Transactions on Nanotechnology 9, 2 (2010), 184–193.

Digital Library

[32]

M. S. Ansari, H. Jiang, B. F. Cockburn, and J. Han. 2018. Low-power approximate multipliers using encoded partial products and approximate compressors. IEEE Journal on Emerging and Selected Topics in Circuits and Systems 8, 3 (2018), 404–416.

Cited By

Ubhi JYadav JGoyal C(2024)Design of CNFET Based Approximate Full Adder for Motion Detector Application2024 1st International Conference on Smart Energy Systems and Artificial Intelligence (SESAI)10.1109/SESAI61023.2024.10599443(1-5)Online publication date: 3-Jun-2024
https://doi.org/10.1109/SESAI61023.2024.10599443
Juneja SSharma K(2024)CNTFET based leakage control static approximate full adder circuit for high performance multimedia applicationsAEU - International Journal of Electronics and Communications10.1016/j.aeue.2024.155626(155626)Online publication date: Dec-2024
https://doi.org/10.1016/j.aeue.2024.155626
Shahrokhi SHosseinzadeh MReshadi MGorgin S(2023)A Novel High-Speed and Low-PDP Approximate Full Adder Cell for Image BlendingMathematics10.3390/math1112264911:12(2649)Online publication date: 10-Jun-2023
https://doi.org/10.3390/math11122649
Show More Cited By

Index Terms

A Novel Highly-Efficient Inexact Full Adder Cell for Motion and Edge Detection Systems of Image Processing in CNFET Technology
1. Hardware
  1. Integrated circuits
    1. Logic circuits
      1. Arithmetic and datapath circuits

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Published In

cover image ACM Journal on Emerging Technologies in Computing Systems

ACM Journal on Emerging Technologies in Computing Systems Volume 18, Issue 4

October 2022

429 pages

ISSN:1550-4832

EISSN:1550-4840

DOI:10.1145/3563906

Editor:
Ramesh Karri
Polytechnic Institute of New York University, USA

Issue’s Table of Contents

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected].

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Association for Computing Machinery

New York, NY, United States

Journal Family

ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 27 October 2022

Online AM: 30 March 2022

Accepted: 03 March 2022

Revised: 11 June 2021

Received: 09 February 2021

Published in JETC Volume 18, Issue 4

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Cited By

Ubhi JYadav JGoyal C(2024)Design of CNFET Based Approximate Full Adder for Motion Detector Application2024 1st International Conference on Smart Energy Systems and Artificial Intelligence (SESAI)10.1109/SESAI61023.2024.10599443(1-5)Online publication date: 3-Jun-2024
https://doi.org/10.1109/SESAI61023.2024.10599443
Juneja SSharma K(2024)CNTFET based leakage control static approximate full adder circuit for high performance multimedia applicationsAEU - International Journal of Electronics and Communications10.1016/j.aeue.2024.155626(155626)Online publication date: Dec-2024
https://doi.org/10.1016/j.aeue.2024.155626
Shahrokhi SHosseinzadeh MReshadi MGorgin S(2023)A Novel High-Speed and Low-PDP Approximate Full Adder Cell for Image BlendingMathematics10.3390/math1112264911:12(2649)Online publication date: 10-Jun-2023
https://doi.org/10.3390/math11122649
Huang NCao G(2023)Improved Algorithm for Edge Detection of Building Structures and Cracks Based on IFC2023 International Conference on Data Science and Network Security (ICDSNS)10.1109/ICDSNS58469.2023.10244879(1-6)Online publication date: 28-Jul-2023
https://doi.org/10.1109/ICDSNS58469.2023.10244879
Farahani SReshadinezhad MFatemieh S(2023)New design for error-resilient approximate multipliers used in image processing in CNTFET technologyThe Journal of Supercomputing10.1007/s11227-023-05623-380:3(3694-3712)Online publication date: 5-Sep-2023
https://dl.acm.org/doi/10.1007/s11227-023-05623-3

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