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AIMCU-MESO: An In-Memory Computing Unit Constructed by MESO Device

Published: 10 December 2022 Publication History

Abstract

Traditional CMOS-based von-Neumann computer architecture faces the issue of memory wall that the limitation of bus-bandwidth and the speed mismatch between processor and memory restrict the efficiency of data processing along with an irreducible energy consumption conducted by data movement, especially in some data-intensive applications. Recently, some novel in-memory computing (IMC) paradigms developed by utilizing the characteristics of different non-volatile memories provide promising ways to overcome the bottleneck of memory wall. Here, we propose a new IMC unit based on a memory array with the core element of magnetoelectric spin-orbit logic (MESO) device (AIMCU-MESO), in which the characteristics of the MESO device are exploited to achieve several in-memory logic operations with the functions of NAND, NOR, and XOR in the MESO-based memory array. With the aid of some transistor-based switches, these logic operations can be achieved between any two MESOs in the array. Furthermore, the computing process of a 1-bit full adder (FA) is achieved in AIMCU-MESO by the in-memory logic manner to demonstrate the ability of logic cascading. The result of SPICE simulation for achieving the 1-bit FA using MESO devices is demonstrated, and the performances are compared with other designs of spintronics-based devices. Compared to multilevel voltage-controlled spin-orbit torque–based magnetic memory, the proposed design demonstrates 71.4% and 49.2% reductions in terms of storage delay and logic delay, respectively.

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Cited By

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  • (2024)Realizing In-Memory Computing using Reliable Differential 8T SRAM for Improved LatencyACM Transactions on Design Automation of Electronic Systems10.1145/369666629:6(1-15)Online publication date: 23-Sep-2024
  • (2024)Roadmap on low-power electronicsAPL Materials10.1063/5.018477412:9Online publication date: 17-Sep-2024

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Published In

cover image ACM Transactions on Design Automation of Electronic Systems
ACM Transactions on Design Automation of Electronic Systems  Volume 28, Issue 1
January 2023
321 pages
ISSN:1084-4309
EISSN:1557-7309
DOI:10.1145/3573313
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Association for Computing Machinery

New York, NY, United States

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Publication History

Published: 10 December 2022
Online AM: 26 May 2022
Accepted: 23 May 2022
Revised: 13 May 2022
Received: 15 November 2021
Published in TODAES Volume 28, Issue 1

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Author Tags

  1. In-memory computing (IMC)
  2. logic in memory
  3. magnetic memory
  4. magnetoelectric spin-orbit (MESO)
  5. spintronic logic

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  • Research-article
  • Refereed

Funding Sources

  • National Natural Science Foundation of China
  • Research Foundation from National University of Defense Technology
  • Open Project Program of Wuhan National Laboratory for Optoelectronics

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  • (2024)Realizing In-Memory Computing using Reliable Differential 8T SRAM for Improved LatencyACM Transactions on Design Automation of Electronic Systems10.1145/369666629:6(1-15)Online publication date: 23-Sep-2024
  • (2024)Roadmap on low-power electronicsAPL Materials10.1063/5.018477412:9Online publication date: 17-Sep-2024

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