CoVerPlan: A Comprehensive Verification Planning Framework Leveraging PSS Specifications
Article No.: 9, Pages 1 - 32
Abstract
With increasing design complexity, the portability of tests across different designs and platforms becomes a key criterion for accelerating verification closure. The Portable Test and Stimulus Standard (PSS) is an emerging industry standard prepared by Accellera for system-on-chip verification and testing. It provides language constructs to create a target-agnostic representation of stimulus and test scenarios reused by various users across many levels of integration. In this article, we present CoVerPlan, a comprehensive verification framework built to explore the power of action inferencing on test models written in PSS. The proposed verification framework leverages a Boolean satisfiability problem planner to unwind the actual verification flow from the PSS specifications and automatically synthesizes target-specific constraint-random testbenches and formal assertions. CoVerPlan also carries out assertion-based verification of the synthesized properties. We demonstrate the efficacy of our proposed framework over several case studies, like the Advanced Microcontroller Bus Architecture advanced peripheral bus protocol, a simple Reduced Instruction Set Computer processor, and a cache coherence protocol.
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Index Terms
- CoVerPlan: A Comprehensive Verification Planning Framework Leveraging PSS Specifications
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January 2023
321 pages
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Publication History
Published: 10 December 2022
Online AM: 11 June 2022
Accepted: 23 May 2022
Revised: 19 May 2022
Received: 22 January 2022
Published in TODAES Volume 28, Issue 1
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