Wei W. Xing
Weisheng Zhao
Skip Abstract Section
Abstract
One of the greatest challenges in integrated circuit design is the repeated executions of computationally expensive SPICE simulations, particularly when highly complex chip testing/verification is involved. Recently, pseudo-transient analysis (PTA) has shown to be one of the most promising continuation SPICE solvers. However, the PTA efficiency is highly influenced by the inserted pseudo-parameters. In this work, we proposed BoA-PTA, a Bayesian optimization accelerated PTA that can substantially accelerate simulations and improve convergence performance without introducing extra errors. Furthermore, our method does not require any pre-computation data or offline training. The acceleration framework can either speed up ongoing, repeated simulations (e.g., Monte-Carlo simulations) immediately or improve new simulations of completely different circuits. BoA-PTA is equipped with cutting-edge machine learning techniques, such as deep learning, Gaussian process, Bayesian optimization, non-stationary monotonic transformation, and variational inference via reparameterization. We assess BoA-PTA in 43 benchmark circuits and real industrial circuits against other SOTA methods and demonstrate an average of 1.5x (maximum 3.5x) for the benchmark circuits and up to 250x speedup for the industrial circuit designs over the original CEPTA without sacrificing any accuracy.
- [1] . 2008. Gaussian process product models for nonparametric nonstationarity. In Proceedings of the 25th International Conference on Machine Learning. 1–8.Google Scholar
Digital Library
- [2] . 2018. Input offset estimation of CMOS integrated circuits in weak inversion. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26, 9 (2018), 1812–1816.Google ScholarCross Ref
- [3] . 1993. CircuitSim93: A circuit simulator benchmarking methodology case study. In Proceedings of the 6th Annual IEEE International ASIC Conference and Exhibit. 531–535.Google ScholarCross Ref
- [4] . 2007. Pattern Recognition and Machine Learning. Springer.Google Scholar
- [5] . 2012. Modeling nonstationary processes through dimension expansion. Journal of the American Statistical Association 107, 497 (2012), 281–289.Google ScholarCross Ref
- [6] . 2004. Convex Optimization. Cambridge University Press.Google ScholarDigital Library
- [7] . 2010. A tutorial on Bayesian optimization of expensive cost functions, with application to active user modeling and hierarchical reinforcement learning. arXiv preprint arXiv:1012.2599.Google Scholar
- [8] . 2017. Parallel Sparse Direct Solver for Integrated Circuit Simulation. Springer.Google ScholarCross Ref
- [9] . 1995. The DAE-index in electric circuit simulation. Mathematics and Computers in Simulation 39, 5–6 (1995), 573–582.Google ScholarDigital Library
- [10] . 2014. Predictive entropy search for efficient global optimization of black-box functions. In Advances in Neural Information Processing Systems 27 (2014), 918–926.Google ScholarDigital Library
- [11] . 2021. Machine learning for electronic design automation: A survey. ACM Transactions on Design Automation of Electronic Systems 26, 5 (2021), Article 40, 46 pages.Google Scholar
- [12] . 2011. Sequential model-based optimization for general algorithm configuration. In Proceedings of the International Conference on Learning and Intelligent Optimization. 507–523.Google ScholarDigital Library
- [13] . 2015. Effective ramping algorithm and restart algorithm in the SPICE3 implementation for DPTA method. Nonlinear Theory and Its Applications, IEICE 6, 4 (2015), 499–511.Google ScholarCross Ref
- [14] . 1998. Efficient global optimization of expensive black-box functions. Journal of Global Optimization 13, 4 (1998), 455–492.Google ScholarDigital Library
- [15] . 1996. Reinforcement learning: A survey. Journal of Artificial Intelligence Research 4 (1996), 237–285.Google ScholarDigital Library
- [16] . 2001. Bayesian calibration of computer models. Journal of the Royal Statistical Society: Series B (Statistical Methodology) 63, 3 (2001), 425–464.Google ScholarCross Ref
- [17] . 2014. Adam: A method for stochastic optimization. arXiv preprint arXiv:1412.6980.Google Scholar
- [18] . 2014. Auto-encoding variational Bayes. In Proceedings of the International Conference on Learning Representations (ICLR’14).Google Scholar
- [19] . 2015. Deep learning. Nature 521, 7553 (2015), 436–444.Google ScholarCross Ref
- [20] . 2010. An accurate and efficient yield optimization method for analog circuits based on computing budget allocation and memetic search technique. In Proceedings of the 2010 Design, Automation, and Test in Europe Conference and Exhibition (DATE’10). 1106–1111.Google ScholarCross Ref
- [21] . 2018. Batch Bayesian optimization via multi-objective acquisition ensemble for automated analog circuit design. In Proceedings of the International Conference on Machine Learning. 3306–3314.Google Scholar
- [22] . 2019. High performance graph convolutional networks with applications in testability analysis. In Proceedings of the 56th Annual Design Automation Conference (DAC’18).Google ScholarDigital Library
- [23] . 2012. Bayesian Approach to Global Optimization: Theory and Applications. Vol. 37. Springer Science & Business Media.Google Scholar
- [24] . 1975. A Computer Program to Simulate Semiconductor Circuits. College of Engineering, University of California.Google Scholar
- [25] . 2002. Testing cross-talk induced delay faults in static CMOS circuit through dynamic timing analysis. In Proceedings of the International Test Conference. IEEE, Los Alamitos, CA, 384–390.Google ScholarCross Ref
- [26] . 2006. Gaussian Processes for Machine Learning. MIT Press, Cambridge, MA.Google ScholarDigital Library
- [27] . 2020. ParaGraph: Layout parasitics and device parameter prediction using graph neural networks. In Proceedings of the 2020 57th ACM/IEEE Design Automation Conference (DAC’20). IEEE, Los Alamitos, CA, 1–6.Google ScholarCross Ref
- [28] . 2017. Synthesis and characterization of new nanocomposite CTAB-PTA@ CS as an efficient heterogeneous catalyst for oxidative desulphurization of gasoline. Chemical Engineering Journal 312 (2017), 243–251.Google ScholarCross Ref
- [29] . 2005. Delivering global DC convergence for large mixed-signal circuits via homotopy/continuation methods. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 25, 1 (2005), 66–78.Google ScholarDigital Library
- [30] . 2011. The correlated knowledge gradient for simulation optimization of continuous parameters using Gaussian process regression. SIAM Journal on Optimization 21, 3 (2011), 996–1026.Google ScholarCross Ref
- [31] . 2015. Taking the human out of the loop: A review of Bayesian optimization. Proceedings of the IEEE 104, 1 (2015), 148–175.Google ScholarCross Ref
- [32] . 2012. Practical Bayesian optimization of machine learning algorithms. In Advances in Neural Information Processing Systems. 2951–2959.Google ScholarDigital Library
- [33] . 2014. Input warping for Bayesian optimization of non-stationary functions. In Proceedings of the International Conference on Machine Learning. 1674–1682.Google Scholar
- [34] . 2010. Gaussian process optimization in the bandit setting: No regret and experimental design. In Proceedings of the 27th International Conference on Machine Learning. 1015–1022.Google ScholarDigital Library
- [35] . 2012. Robust time-domain source stepping for DC-solution of circuit equations. In Proceedings of Scientific Computing in Electrical Engineering (SCEE’12).39–40.Google Scholar
- [36] . 2009. Variational learning of inducing variables in sparse Gaussian processes. In Proceedings of the International Conference on Artificial Intelligence and Statistics. 567–574.Google Scholar
- [37] . 2012. DC operating points of transistor circuits. Nonlinear Theory Its Applications, IEICE 3, 3 (2012), 287–300.Google ScholarCross Ref
- [38] . 2012. DC large-scale simulation of nonlinear circuits on parallel processors. International Journal of Electronics and Telecommunications 58, 3 (2012), 285–295.Google ScholarCross Ref
- [39] . 2002. An efficient algorithm for finding multiple DC solutions based on the SPICE-oriented Newton homotopy method. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 21, 3 (2002), 337–348.Google ScholarDigital Library
- [40] . 2006. An efficient algorithm for finding multiple DC solutions based on the SPICE-oriented Newton homotopy method. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 21, 3 (2006), 337–348.Google ScholarDigital Library
- [41] . 2009. Electronic Design Automation: Synthesis, Verification, and Test. Morgan Kaufmann.Google Scholar
- [42] . 2017. Max-value entropy search for efficient Bayesian optimization. In Proceedings of the 34th International Conference on Machine Learning, Volume 70. 3627–3635.Google ScholarDigital Library
- [43] . 2016. Deep kernel learning. In Proceedings of the 19th International Conference on Artificial Intelligence and Statistics. 370–378.Google Scholar
- [44] . 2014. A PTA method using numerical integration algorithms with artificial damping for solving nonlinear DC circuits. Nonlinear Theory and Its Applications, IEICE 5, 4 (2014), 512–522.Google ScholarCross Ref
- [45] . 2016. Manifold learning for the emulation of spatial fields from computational models. Journal of Computational Physics 326 (2016), 666–690.Google ScholarCross Ref
- [46] . 2006. An efficient and globally convergent homotopy method for finding DC operating points of nonlinear circuits. In Proceedings of the 2006 Asia and South Pacific Design Automation Conference (ASP-DAC’06). IEEE, Los Alamitos, CA, 408–415. Google ScholarDigital Library
- [47] . 1999. A fixed-point homotopy method for solving modified nodal equations. IEEE Transactions on Circuits and Systems I Fundamental Theory Applications 46, 6 (1999), 654–665.Google ScholarCross Ref
- [48] . 1999. Some standard SPICE DC algorithms revisited: Why does SPICE still not converge? In Proceedings of the 1999 IEEE International Symposium on Circuits and Systems (ISCAS’99), Vol. 6. 286–289.Google ScholarCross Ref
- [49] . 1999. Some standard SPICE DC algorithms revisited: Why does SPICE still not converge? In Proceedings of the 1999 IEEE International Symposium on Circuits and Systems (ISCAS’99), Vol. 6. IEEE, Los Alamitos, CA, 286–289.Google ScholarCross Ref
- [50] . 2007. An effective SPICE3 implementation of the compound element pseudo-transient algorithm. IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences 90-A, 10 (2007), 2124–2131.Google ScholarCross Ref
- [51] . 2019. Bayesian optimization approach for analog circuit synthesis using neural network. In Proceedings of the 2019 Design, Automation, and Test in Europe Conference and Exhibition (DATE’19). 1463–1468.Google ScholarCross Ref
- [52] . 2019. An efficient multi-fidelity Bayesian optimization approach for analog circuit synthesis. In Proceedings of the 2019 56th ACM/IEEE Design Automation Conference (DAC’19). IEEE, Los Alamitos, CA, 1–6.Google ScholarDigital Library
- [53] . 2020. An efficient asynchronous batch Bayesian optimization approach for analog circuit synthesis. In Proceedings of the 2020 57th ACM/IEEE Design Automation Conference (DAC’20). IEEE, Los Alamitos, CA, 1–6.Google ScholarCross Ref
- [54] . 1997. Algorithm 778: L-BFGS-B: Fortran subroutines for large-scale bound-constrained optimization. ACM Transactions on Mathematical Software 23, 4 (1997), 550–560.Google ScholarDigital Library
Index Terms
- BoA-PTA: A Bayesian Optimization Accelerated PTA Solver for SPICE Simulation
Recommendations
Convergence Issues in Resonant Tunneling Diode Circuit Simulation
VLSID '00: Proceedings of the 13th International Conference on VLSI DesignDue to its status as the fastest switching semiconductor device and its bistable nature, the resonant tunneling diode (RTD) is considered to be one of the most promising devices for future-generation high-performance VLSI systems. However, popular ...
Spice modeling of oxide and interface trapped charge effects in fully-depleted double-gate FinFETs
As is the case with conventional planar MOS transistors, the electrical characteristics of highly-scaled multi-gate field-effect transistors (FinFETs) also suffer from temporal degradations occurring due to hot-carrier injection, bias temperature ...
Extraction of SPICE Model for Double Gate Vertical MOSFET
AMS '09: Proceedings of the 2009 Third Asia International Conference on Modelling & SimulationVertical MOSFETs device have one important disadvantage, which is higher overlap capacitances such as the separated gate-source and gate-drain parasitic capacitances (CGSO and CGDO), which is known to be most crucial to the high-frequency/speed ...
Comments