60GHz, 12mW, 20 dB Gain, CMOS mm-wave LNA with 6.3-dB NF
Pages 8 - 14
Abstract
One important building block for an integrated 60GHz millimeter-wave CMOS radio transceiver is low-noise amplifier (LNA). In this paper, two- stage cascode LNA with first stage as CS inductive source degeneration has been employed. Gain boosting technique is used to increase gain, where an inductor is attached to the gate of,common gate stage and also network to provide positive feedback. Besides that, SNM (simultaneous noise and input conjugate impedance) matching is used. This design is simulated in 130nm bulk CMOS TSMC process by using cadence virtuoso. Each stage is biased separately by using supply voltage of 1.2V, where = 727mV for an individual stage is generated through this biasing network. Performance metrics of this design are peak gain of 20.3dB, an output-referred 1dB compression point of -22.6dBm at 60GHz, noise figure is 6.3 dB and maximum power dissipation () is 12mW.
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Index Terms
- 60GHz, 12mW, 20 dB Gain, CMOS mm-wave LNA with 6.3-dB NF
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Published In
July 2022
106 pages
ISBN:9781450397131
DOI:10.1145/3560089
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Published: 30 September 2022
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