skip to main content
10.1145/3569052.3578924acmconferencesArticle/Chapter ViewAbstractPublication PagesispdConference Proceedingsconference-collections
research-article

Benchmarking Advanced Security Closure of Physical Layouts: ISPD 2023 Contest

Published: 26 March 2023 Publication History

Abstract

Computer-aided design (CAD) tools traditionally optimize "only'' for power, performance, and area (PPA). However, given the wide range of hardware-security threats that have emerged, future CAD flows must also incorporate techniques for designing secure and trustworthy integrated circuits (ICs). This is because threats that are not addressed during design time will inevitably be exploited in the field, where system vulnerabilities induced by ICs are almost impossible to fix. However, there is currently little experience for designing secure ICs within the CAD community.
This contest seeks to actively engage with the community to close this gap. The theme is security closure of physical layouts, that is, hardening the physical layouts at design time against threats that are executed post-design time. Acting as security engineers, contest participants will proactively analyse and fix the vulnerabilities of benchmark layouts in a blue-team approach. Benchmarks and submissions are based on the generic DEF format and related files.
This contest is focused on the threat of Trojans, with challenging aspects for physical design in general and for hindering Trojan insertion in particular. For one, layouts are based on the ASAP7 library and rules are strict, e.g., no DRC issues and no timing violations are allowed at all. In the alpha/qualifying round, submissions are evaluated using first-order metrics focused on exploitable placement and routing resources, whereas in the final round, submissions are thoroughly evaluated (red-teamed) through actual insertion of different Trojans.

References

[1]
2007. Cryptographic Hardware Project. http://www.aoki.ecei.tohoku.ac.jp/crypto/
[2]
2012. Freecores: tiny_aes128 implementation. https://github.com/freecores/tiny_ aes
[3]
2013. Hardware implementation of the SHA-256. https://github.com/secworks/ sha256
[4]
2022. Reference Design for a modified version of ASAP7nm. https://github.com/ Centre-for-Hardware-Security/asap7_reference_design
[5]
Swarup Bhunia, Miron Abramovici, Dakshi Agrawal, Paul Bradley, Michael S. Hsiao, Jim Plusquellic, and Mohammad Tehranipoor. 2013. Protection Against Hardware Trojan Attacks: Towards a Comprehensive Solution. Des. Test 30, 3 (2013), 6--17. https://doi.org/10.1109/MDT.2012.2196252
[6]
Lawrence T. Clark, Vinay Vashishtha, Lucian Shifren, Aditya Gujja, Saurabh Sinha, Brian Cline, Chandarasekaran Ramamurthy, and Greg Yeric. 2016. ASAP7: A 7-nm finFET predictive process design kit. Microelectronics Journal 53 (2016), 105--115. https://doi.org/10.1016/j.mejo.2016.04.006
[7]
Vasudev Gohil, Satwik Patnaik, Hao Guo, Dileep Kalathil, and Jeyavijayan (JV) Rajendran. 2022. DETERRENT: Detecting Trojans Using Reinforcement Learning. In Proc. Des. Autom. Conf. 697--702. https://doi.org/10.1145/3489517.3530518
[8]
Alexander Hepp, Tiago Perez, Samuel Pagliarini, and Georg Sigl. 2022. A Pragmatic Methodology for Blind Hardware Trojan Insertion in Finalized Layouts. In Proc. Int. Conf. Comp.-Aided Des. https://doi.org/10.1145/3508352.3549452
[9]
W. Hu, C. H. Chang, A. Sengupta, S. Bhunia, R. Kastner, and H. Li. 2020. An Overview of Hardware Security and Trust: Threats, Countermeasures and Design Tools. Trans. Comp.-Aided Des. Integ. Circ. Sys. (2020). https://doi.org/10.1109/ TCAD.2020.3047976
[10]
Susmit Jha and Sumit Kumar Jha. 2008. Randomization Based Probabilistic Approach to Detect Trojan Circuits. In High Assur. Sys. Eng. Symp. 117--124. https://doi.org/10.1109/HASE.2008.37
[11]
A. B. Kahng and T. Spyrou. 2021. The OpenROAD Project: Unleashing Hardware Innovation. In Proc. GOMACTech. https://theopenroadproject.org
[12]
Ramesh Karri, Jeyavijayan Rajendran, Kurt Rosenfeld, and Mohammad Tehranipoor. 2010. Trustworthy Hardware: Identifying and Classifying Hardware Trojans. Computer 43, 10 (2010), 39--46. https://doi.org/10.1109/MC.2010.299
[13]
J. Knechtel. 2021. Hardware Security for and beyond CMOS Technology. In Proc. Int. Symp. Phys. Des. https://doi.org/10.1145/3439706.3446902
[14]
J. Knechtel. 2022--2023. Backend Daemon Scripts. https://github.com/DfX-NYUAD/backend_daemon_gdrive
[15]
J. Knechtel et al. 2022--2023. Advanced Security Closure of Physical Layouts. https://wp.nyu.edu/ispd23_contest/
[16]
J. Knechtel, J. Gopinath, J. Bhandari, M. Ashraf, H. Amrouch, S. Borkar, S.-K. Lim, O. Sinanoglu, and R. Karri. 2021. Security Closure of Physical Layouts. In Proc. Int. Conf. Comp.-Aided Des. https://doi.org/10.1109/ICCAD51958.2021.9643543
[17]
J. Knechtel, E. B. Kavun, F. Regazzoni, A. Heuser, A. Chattopadhyay, D. Mukhopad- hyay, S. Dey, Y. Fei, Y. Belenky, I. Levi, T. Güneysu, P. Schaumont, and I. Polian. 2020. Towards Secure Composition of Integrated Circuits and Electronic Systems: On the Role of EDA. In Proc. Des. Autom. Test Europe. https: //doi.org/10.23919/DATE48585.2020.9116483
[18]
Nimisha Limaye, Nikhil Rangarajan, Satwik Patnaik, Ozgur Sinanoglu, and Kanad Basu. 2022. PolyWorm: Leveraging Polymorphic Behavior to Implant Hardware Trojans. Trans. Emerg. Top. Comp. 10, 3 (2022), 1443--1455. https://doi.org/10. 1109/TETC.2021.3090060
[19]
Eric Love, Yier Jin, and Yiorgos Makris. 2012. Proof-Carrying Hardware Intellec- tual Property: A Pathway to Trusted Module Acquisition. Trans. Inf. Forens. Sec. 7, 1 (2012), 25--40. https://doi.org/10.1109/TIFS.2011.2160627
[20]
Satwik Patnaik, Mohammed Ashraf, Ozgur Sinanoglu, and Johann Knechtel. 2019. A Modern Approach to IP Protection and Trojan Prevention: Split Manufacturing for 3D ICs and Obfuscation of Vertical Interconnects. Trans. Emerg. Top. Comp. 9 (2019), 1815--1834. Issue 4. https://doi.org/10.1109/TETC.2019.2933572
[21]
Tiago Perez and Samuel Pagliarini. 2022. Hardware Trojan Insertion in Finalized Layouts: From Methodology to a Silicon Demonstration. Trans. Comp.-Aided Des. Integ. Circ. Sys. (2022). https://doi.org/10.1109/TCAD.2022.3223846
[22]
Nikhil Rangarajan, Satwik Patnaik, Johann Knechtel, Shaloo Rakheja, and Ozgur Sinanoglu. 2022. The Next Era in Hardware Security. Springer. https://doi.org/10. 1007/978-3-030-85792-9
[23]
Mohammad Tehranipoor and Farinaz Koushanfar. 2010. A Survey of Hardware Trojan Taxonomy and Detection. Des. Test 27, 1 (2010), 10--25. https://doi.org/ 10.1109/MDT.2010.7
[24]
Vinay Vashishtha, Manoj Vangala, and Lawrence T. Clark. 2017. ASAP7 predictive design kit development and cell design technology co-optimization: Invited paper. In Proc. Int. Conf. Comp.-Aided Des. 992--998. https://doi.org/10.1109/ICCAD. 2017.8203889
[25]
Fangzhou Wang, Qijing Wang, Bangqi Fu, Shui Jiang, Xiaopeng Zhang, Lilas Alrahis, Ozgur Sinanoglu, Johann Knechtel, Tsung-Yi Ho, and Evangeline F. Y. Young. 2023. Security Closure of IC Layouts Against Hardware Trojans. In Proc. Int. Symp. Phys. Des. https://doi.org/10.1145/3569052.3571878
[26]
Kan Xiao and Mohammed Tehranipoor. 2013. BISA: Built-in self-authentication for preventing hardware Trojan insertion. In Proc. Int. Symp. Hardw.-Orient. Sec. Trust. 45--50. https://doi.org/10.1109/HST.2013.6581564
[27]
K. Yang, M. Hicks, Q. Dong, T. Austin, and D. Sylvester. 2016. A2: Analog Malicious Hardware. In Proc. Symp. Sec. Priv. https://doi.org/10.1109/SP.2016.10

Cited By

View all
  • (2025)Detection of Voltage Droop-Induced Timing Fault Attacks Due to Hardware TrojansIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2024.341839544:1(280-293)Online publication date: Jan-2025
  • (2024)Beware Your Standard Cells! On Their Role in Static Power Side-Channel AttacksIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2024.339473643:12(4439-4452)Online publication date: Dec-2024
  • (2024)Safeguarding the Silicon: Strategies for Integrated Circuit Layout Protection2024 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)10.1109/APCCAS62602.2024.10808337(466-470)Online publication date: 7-Nov-2024
  • Show More Cited By

Index Terms

  1. Benchmarking Advanced Security Closure of Physical Layouts: ISPD 2023 Contest

      Recommendations

      Comments

      Information & Contributors

      Information

      Published In

      cover image ACM Conferences
      ISPD '23: Proceedings of the 2023 International Symposium on Physical Design
      March 2023
      278 pages
      ISBN:9781450399784
      DOI:10.1145/3569052
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than the author(s) must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected].

      Sponsors

      Publisher

      Association for Computing Machinery

      New York, NY, United States

      Publication History

      Published: 26 March 2023

      Permissions

      Request permissions for this article.

      Check for updates

      Author Tags

      1. asap7
      2. contest
      3. hardware security
      4. hardware trojans
      5. physical design
      6. security closure

      Qualifiers

      • Research-article

      Conference

      ISPD '23
      Sponsor:
      ISPD '23: International Symposium on Physical Design
      March 26 - 29, 2023
      Virtual Event, USA

      Acceptance Rates

      Overall Acceptance Rate 62 of 172 submissions, 36%

      Upcoming Conference

      ISPD '25
      International Symposium on Physical Design
      March 16 - 19, 2025
      Austin , TX , USA

      Contributors

      Other Metrics

      Bibliometrics & Citations

      Bibliometrics

      Article Metrics

      • Downloads (Last 12 months)53
      • Downloads (Last 6 weeks)3
      Reflects downloads up to 17 Jan 2025

      Other Metrics

      Citations

      Cited By

      View all
      • (2025)Detection of Voltage Droop-Induced Timing Fault Attacks Due to Hardware TrojansIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2024.341839544:1(280-293)Online publication date: Jan-2025
      • (2024)Beware Your Standard Cells! On Their Role in Static Power Side-Channel AttacksIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2024.339473643:12(4439-4452)Online publication date: Dec-2024
      • (2024)Safeguarding the Silicon: Strategies for Integrated Circuit Layout Protection2024 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)10.1109/APCCAS62602.2024.10808337(466-470)Online publication date: 7-Nov-2024
      • (2024)Preventing short violations in clock routing with an SVM classifier before powerplanning and placementMicroelectronics Journal10.1016/j.mejo.2024.106429153(106429)Online publication date: Nov-2024

      View Options

      Login options

      View options

      PDF

      View or Download as a PDF file.

      PDF

      eReader

      View online with eReader.

      eReader

      Media

      Figures

      Other

      Tables

      Share

      Share

      Share this Publication link

      Share on social media