skip to main content
10.1145/3569052.3580221acmconferencesArticle/Chapter ViewAbstractPublication PagesispdConference Proceedingsconference-collections
invited-talk

EDA for Domain Specific Computing: An Introduction for the Panel

Published: 26 March 2023 Publication History

Abstract

This panel explores domain-specific computing from hardware, software, and electronic design automation (EDA) perspectives.
Hennessey and Patterson signaled a new "golden age of computer architecture" in 2018 [1]. Process technology advances and general-purpose processor improvements provided much faster and more efficient computation, but scaling with Moore's law has slowed significantly. Domain-specific customization can improve power-performance efficiency by orders-of-magnitude for important application domains, such as graphics, deep neural networks (DNN) for machine learning [2], simulation, bioinformatics [3], image processing, and many other tasks.
The common features of domain-specific architectures are: 1) dedicated memories to minimize data movement across chip; 2) more arithmetic units or bigger memories; 3) use of parallelism matching the domain; 4) smaller data types appropriate for the target applications; and 5) domain-specific software languages. Expediting software development with optimized compilation for efficient fast computation on heterogeneous architectures is a difficult task, and must be considered with the hardware design. For example, GPU programming has used CUDA and OpenCL.
The hardware comprises application-specific integrated circuits (ASICs) [4] and systems-of-chips (SoCs). General-purpose processor cores are often combined with graphics processing units (GPUs) for stream processing, digital signal processors, field programmable gate arrays (FPGAs) for configurability [5], artificial intelligence (AI) acceleration hardware, and so forth.
Domain-specific computers have been deployed recently. For example: the Google Tensor Processing Unit (DNN ASIC) [6]; Microsoft Catapult (FPGA-based cloud domain-service solution) [7]; Intel Crest (DNN ASIC) [8]; Google Pixel Visual Core (image processing and computer vision for cell phones and tablets) [9]; and the RISC-V architecture and open instruction set for heterogeneous computing [10].

References

[1]
J. Hennessy and D. Patterson. A new golden age for computer architecture: domain-specific hardware/software co-design, enhanced security, open instruction sets, and agile chip development. Proc. International Symposium on Computer Architecture (ISCA), 2018, 27--29.
[2]
S. Neuendorffer, A. K. Khodamoradi, K. Denolf, A. K. Jain, and S. Bayliss. The evolution of domain-specific computing for deep learning. IEEE Circuits and Systems Magazine, 21, 2 (Second quarter 2021), 75--96.
[3]
W. J. Dally, Y. Turakhia, and S. Han. Domain-specific hardware accelerators. Communications of the ACM, 63, 7 (July 2020), 48--57.
[4]
M. Smith. Application-Specific Integrated Circuits. Addison-Wesley, 1997.
[5]
Y. Chi, W. Qiao, A. Sohrabizadeh, J. Wang, and J. Cong. Democratizing domain-specific computing. Communications of the ACM, 66, 1 (January 2023), 74--85.
[6]
N.P. Jouppi, et al. In-datacenter performance analysis of a tensor processing unit. Proc. International Symposium on Computer Architecture (ISCA), 2017, 1--12.
[7]
J. Fowers, et al. A configurable cloud-scale DNN processor for real-time AI. Proc. International Symposium on Computer Architecture (ISCA), 2018, 1--14.
[8]
A. Yang. Deep learning training at scale Spring Crest deep learning accelerator (Intel® Nervana? NNP-T). Proc. Hot Chips 31 Symposium (HCS), 2019, 1--20.
[9]
J. Redgrave, et al. The Pixel Visual Core: Google's Fully Programmable Image, Vision and AI Processor for Mobile Devices. Hot Chips, 2018.
[10]
J. Zuckerman, et al. Enabling Heterogeneous, Multicore SoC Research with RISC-V and ESP. Sixth Workshop on Computer Architecture Research, June 2022.

Recommendations

Comments

Information & Contributors

Information

Published In

cover image ACM Conferences
ISPD '23: Proceedings of the 2023 International Symposium on Physical Design
March 2023
278 pages
ISBN:9781450399784
DOI:10.1145/3569052
Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for third-party components of this work must be honored. For all other uses, contact the Owner/Author.

Sponsors

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 26 March 2023

Check for updates

Author Tags

  1. domain specific computing
  2. electronic design automation

Qualifiers

  • Invited-talk

Conference

ISPD '23
Sponsor:
ISPD '23: International Symposium on Physical Design
March 26 - 29, 2023
Virtual Event, USA

Acceptance Rates

Overall Acceptance Rate 62 of 172 submissions, 36%

Upcoming Conference

ISPD '25
International Symposium on Physical Design
March 16 - 19, 2025
Austin , TX , USA

Contributors

Other Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

  • 0
    Total Citations
  • 97
    Total Downloads
  • Downloads (Last 12 months)25
  • Downloads (Last 6 weeks)1
Reflects downloads up to 17 Jan 2025

Other Metrics

Citations

View Options

Login options

View options

PDF

View or Download as a PDF file.

PDF

eReader

View online with eReader.

eReader

Media

Figures

Other

Tables

Share

Share

Share this Publication link

Share on social media