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A Low Power Operational Amplifier Design Based on SOI DTMOS

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Published:15 March 2023Publication History

ABSTRACT

In this work, a new operational amplifier using 0.13 μm SOI technology is proposed based on dynamic threshold voltage transistors (DTMOS) for low voltage applications such as the two stages operational amplifier of ultra-low power consumption Internet of Things (IoT) nodes. The operational amplifier uses a two stages configuration, where differential input transistor pairs followed by a single ended class AB output and the input stage uses a DTMOS device structure. Simulation results show that the novel designed operational amplifier has a loop gain of 65.5 dB, a phase margin of 67 ° and unit gain frequency of 37.37 MHz under a 5 pf and 10 kΩ load, using the 0.13 μm partially depleted (PD) SOI technology. In addition, if a lower operating voltage is applied, the power consumption of the circuit low voltage operational amplifier can be further reduced.

References

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  • Published in

    cover image ACM Other conferences
    EITCE '22: Proceedings of the 2022 6th International Conference on Electronic Information Technology and Computer Engineering
    October 2022
    1999 pages
    ISBN:9781450397148
    DOI:10.1145/3573428

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    Publication History

    • Published: 15 March 2023

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