ILP-based Substrate Routing with Mismatched Via Dimension Consideration for Wire-bonding FBGA Package Design

With the rapidly growing demand for system-level integration, package substrates have become one of the most important carriers in semiconductor industry. Fine pitch ball grid array (FBGA) packaging is a widely used technology thanks to its relative cost-effectiveness compared to other advanced packaging technologies. In addition, it is also widely used in space-constrained applications, such as mobile and handheld devices. These packaging substrate interconnections are usually customized by layout engineers taking many complex and stringent design rules into consideration. However, fully net-by-net manual design for FBGA is time-consuming and error-prone. In this article, we propose an integer linear programming (ILP)-based router for wire-bonding FBGA packaging design. Our ILP formulation not only can handle design-dependent constraints but also take the problem of mismatched via dimension into account, which is caused by the mechanical processes and greatly increases design complexity. In addition to the ILP formulation for substrate routing, three optimization stages and several ILP constraint reduction techniques are also developed to boost the run time of ILP solver. Experimental results indicate that the proposed framework can achieve high routing completion rates, which could effectively reduce the cycle time of substrate layout design. In addition, in combination with the proposed optimization strategies, 278× speedup can be achieved compared to the ILP constraint optimized router.