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SenTer: A Reconfigurable Processing-in-Sensor Architecture Enabling Efficient Ternary MLP

Published:05 June 2023Publication History

ABSTRACT

Recently, Intelligent IoT (IIoT), including various sensors, has gained significant attention due to its capability of sensing, deciding, and acting by leveraging artificial neural networks (ANN). Nevertheless, to achieve acceptable accuracy and high performance in visual systems, a power-delay-efficient architecture is required. In this paper, we propose an ultra-low-power processing in-sensor architecture, namely SenTer, realizing low-precision ternary multi-layer perceptron networks, which can operate in detection and classification modes. Moreover, SenTer supports two activation functions based on user needs and the desired accuracy-energy trade-off. SenTer is capable of performing all the required computations for the MLP's first layer in the analog domain and then submitting its results to a co-processor. Therefore, SenTer significantly reduces the overhead of analog buffers, data conversion, and transmission power consumption by using only one ADC. Additionally, our simulation results demonstrate acceptable accuracy on various datasets compared to the full precision models.

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          cover image ACM Conferences
          GLSVLSI '23: Proceedings of the Great Lakes Symposium on VLSI 2023
          June 2023
          731 pages
          ISBN:9798400701252
          DOI:10.1145/3583781

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          • Published: 5 June 2023

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