research-article

MEDUSA: A Multi-Resolution Machine Learning Congestion Estimation Method for 2D and 3D Global Routing

Authors:

Guy G. F. Lemieux,

André IvanovAuthors Info & Claims

ACM Transactions on Design Automation of Electronic Systems, Volume 28, Issue 5

Article No.: 73, Pages 1 - 25

https://doi.org/10.1145/3590768

Published: 09 September 2023 Publication History

Abstract

Routing congestion is one of the many factors that need to be minimized during the physical design phase of large integrated circuits. In this article, we propose a novel congestion estimation method, called MEDUSA, that consists of three parts: (1) a feature extraction and “hyper-image” encoding; (2) a congestion estimation method using a fixed-resolution convolutional neural network model that takes a tile of this hyper-image as input and makes accurate congestion predictions for a small region of the circuit; and (3) a sliding-window method for repeatedly applying this convolutional neural network on a layout, thereby producing higher-resolution congestion maps for arbitrarily large circuits. The proposed congestion estimation approach works with both 2D (collapsed) and 3D global routing. Using both quantitative metrics and qualitative visual inspection, congestion maps produced with MEDUSA show better accuracy than prior estimation techniques.

Global routers typically use estimation techniques during their first router iteration and then switch to using actual congestion information extracted from the intermediate router solutions. Experimental results within the same global router infrastructure show a significant impact on quality after the first routing iteration; other estimation techniques result in an average of 22% to 54% higher initial overflow counts. This initial quality improvement carries through to the final global routing solution, with other estimation techniques needing up to 5% more routing iterations and up to 3× more runtime, on average. Compared with other global routers, MEDUSA achieves comparable wire length results and lower total overflow counts (more legal global routing solutions) and is typically faster.

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Cited By

Almeida SNetto RFontana TAghaeekiasaraee EGandhi UTabrizi AGüntzel JBehjat LMeinhardt C(2025)Eh-DRVPIntegration, the VLSI Journal10.1016/j.vlsi.2024.102309101:COnline publication date: 1-Mar-2025
https://dl.acm.org/doi/10.1016/j.vlsi.2024.102309
Pan YZhou ZSheikholeslam SIvanov A(2024)VioNet: A Hierarchical Detailed Routing Wire-Short Violation Predictor Based on a Convolutional Neural NetworkIEEE Design & Test10.1109/MDAT.2023.331467241:2(65-74)Online publication date: Apr-2024
https://doi.org/10.1109/MDAT.2023.3314672
Berndt AMeinhardt C(2024)CeConP: Exploring Node Centrality for Early Routing Congestion Prediction2024 IEEE 15th Latin America Symposium on Circuits and Systems (LASCAS)10.1109/LASCAS60203.2024.10506148(1-5)Online publication date: 27-Feb-2024
https://doi.org/10.1109/LASCAS60203.2024.10506148
Show More Cited By

Index Terms

MEDUSA: A Multi-Resolution Machine Learning Congestion Estimation Method for 2D and 3D Global Routing
1. Hardware

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Published In

cover image ACM Transactions on Design Automation of Electronic Systems

ACM Transactions on Design Automation of Electronic Systems Volume 28, Issue 5

September 2023

475 pages

ISSN:1084-4309

EISSN:1557-7309

DOI:10.1145/3623508

Editor:
X. Sharon Hu
University of Notre Dame, USA

Issue’s Table of Contents

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than the author(s) must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected].

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Association for Computing Machinery

New York, NY, United States

Journal Family

ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 09 September 2023

Online AM: 01 April 2023

Accepted: 15 March 2023

Revised: 20 February 2023

Received: 14 August 2022

Published in TODAES Volume 28, Issue 5

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Alliance program and by Huawei (Canada)

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Cited By

Almeida SNetto RFontana TAghaeekiasaraee EGandhi UTabrizi AGüntzel JBehjat LMeinhardt C(2025)Eh-DRVPIntegration, the VLSI Journal10.1016/j.vlsi.2024.102309101:COnline publication date: 1-Mar-2025
https://dl.acm.org/doi/10.1016/j.vlsi.2024.102309
Pan YZhou ZSheikholeslam SIvanov A(2024)VioNet: A Hierarchical Detailed Routing Wire-Short Violation Predictor Based on a Convolutional Neural NetworkIEEE Design & Test10.1109/MDAT.2023.331467241:2(65-74)Online publication date: Apr-2024
https://doi.org/10.1109/MDAT.2023.3314672
Berndt AMeinhardt C(2024)CeConP: Exploring Node Centrality for Early Routing Congestion Prediction2024 IEEE 15th Latin America Symposium on Circuits and Systems (LASCAS)10.1109/LASCAS60203.2024.10506148(1-5)Online publication date: 27-Feb-2024
https://doi.org/10.1109/LASCAS60203.2024.10506148
Chen YSu MDing HWeng SLin ZBai X(2023)High-correlation 3D routability estimation for congestion-guided global routingThe Journal of Supercomputing10.1007/s11227-023-05553-080:3(3114-3141)Online publication date: 29-Aug-2023
https://dl.acm.org/doi/10.1007/s11227-023-05553-0

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