Ahmad Patooghy
Skip Abstract Section
Abstract
Network-on-chip (NoC) is widely used as an efficient communication architecture in multi-core and many-core System-on-chips (SoCs). However, the shared communication resources in an NoC platform, e.g., channels, buffers, and routers, might be used to conduct attacks compromising the security of NoC-based SoCs. Most of the proposed encryption-based protection methods in the literature require leaving some parts of the packet unencrypted to allow the routers to process/forward packets accordingly. This reveals the source/destination information of the packet to malicious routers, which can be exploited in various attacks. For the first time, we propose the idea of secure, anonymous routing with minimal hardware overhead to encrypt the entire packet while exchanging secure information over the network. We have designed and implemented a new NoC architecture that works with encrypted addresses. The proposed method can manage malicious and benign failures at NoC channels and buffers by bypassing failed components with a situation-driven stochastic path diversification approach. Hardware evaluations show that the proposed security solution combats the security threats at the affordable cost of 1.5% area and 20% power overheads chip-wide.
- [1] . 2014. Fort-NoCs: Mitigating the threat of a compromised NoC. In Proceedings of the 51st Annual Design Automation Conference on Design Automation Conference (DAC’14). ACM Press, New York, NY, 1–6.
DOI: Google Scholar
Digital Library
- [2] . 2019. Dynamic and distributed security management for NoC-based MPSoCs. In Proceedings of the International Conference on Computational Science (ICCS’19), , , , , , , , and (Eds.). Springer International Publishing, Cham, 649–662. Google ScholarDigital Library
- [3] . 2014. Hardware Trojan attacks: Threat analysis and countermeasures. Proc. IEEE 102, 8 (2014), 1229–1247.Google ScholarCross Ref
- [4] . 2016. Packet security with path sensitization for NoCs. In Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (DATE’16). Research Publishing Services, Singapore, 1136–1139.
DOI: Google ScholarCross Ref - [5] . 2016. Mitigation of denial of service attack with hardware Trojans in NoC architectures. In Proceedings of the IEEE International Parallel and Distributed Processing Symposium (IPDPS’16). IEEE, 1091–1100.
DOI: Google ScholarCross Ref - [6] . 2018. Securing NoCs against timing attacks with non-interference-based adaptive routing. In Proceedings of the 12th IEEE/ACM International Symposium on Networks-on-Chip (NOCS’18). 1–8.
DOI: Google ScholarCross Ref - [7] . 2019. Security in many-core SoCs leveraged by opaque secure zones. In Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI’19). IEEE, 471–476.
DOI: Google ScholarCross Ref - [8] . 2015. Noxim: An open, extensible and cycle-accurate network on chip simulator. In Proceedings of the IEEE 26th International Conference on Application-specific Systems, Architectures and Processors (ASAP’15). 162–163.Google ScholarCross Ref
- [9] . 2020. Lightweight anonymous routing in NoC-based SoCs. In Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (DATE’20). IEEE, 334–337.Google ScholarCross Ref
- [10] . 2020. Lightweight and trust-aware routing in NoC-based SoCs. In Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI’20). IEEE, 160–167.Google ScholarCross Ref
- [11] . 2020. Securing network-on-chip using incremental cryptography. In Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI’20). IEEE, 168–175.Google ScholarCross Ref
- [12] . 2013. Topology-aware adaptive routing for nonstationary irregular mesh in throttled 3D NoC systems. IEEE Trans. Parallel Distrib. Syst. 24, 10 (2013), 2109–2120.
DOI: Google ScholarDigital Library - [13] . 2013. Highly adaptive and deadlock-free routing for three-dimensional networks-on-chip. IET Comput. Dig. Tech. 7, 6 (2013), 255–263.Google ScholarCross Ref
- [14] . 2018. Routing aware and runtime detection for infected network-on-chip routers. In Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS’18). IEEE, 775–778.Google ScholarCross Ref
- [15] . 2019. Analysis of black hole router attack in network-on-chip. In Proceedings of the IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS’19). IEEE, 69–72.Google ScholarCross Ref
- [16] . 2019. Detection and prevention protocol for black hole attack in network-on-chip. In Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip. 1–2.Google ScholarDigital Library
- [17] . 2011. The Hummingbird-2 lightweight authenticated encryption algorithm. In Proceedings of the International Workshop on Radio Frequency Identification: Security and Privacy Issues. Springer, 19–31.Google Scholar
- [18] . 2016. A security aware routing approach for NoC-based MPSoCs. In Proceedings of the 29th Symposium on Integrated Circuits and Systems Design (SBCCI’16). IEEE, 1–6.Google ScholarCross Ref
- [19] . 2011. Heracles: Fully synthesizable parameterized MIPS-based multicore system. In Proceedings of the 21st International Conference on Field Programmable Logic and Applications. IEEE, 356–362.
DOI: Google ScholarDigital Library - [20] . 2011. Application driven network-on-chip architecture exploration & refinement for a complex SoC. Design Autom. Embed. Syst. 15, 2 (2011), 133–158.Google ScholarDigital Library
- [21] . 2018. Adding security to networks-on-chip using neural networks. In Proceedings of the IEEE Symposium Series on Computational Intelligence (SSCI’18). IEEE, 1299–1306.Google ScholarCross Ref
- [22] . 2014. Hardware Security: Design, Threats, and Safeguards. CRC Press, UK.Google ScholarCross Ref
- [23] . 2019. Your hardware is all wired up! attacking network-on-chips via crosstalk channel. In Proceedings of the 12th International Workshop on Network on Chip Architectures. 1–6.Google ScholarDigital Library
- [24] . 2019. A hierarchical approach to self-test, fault-tolerance and routing security in a Network-on-Chip. In Proceedings of the IEEE International Test Conference India (ITC India’19). IEEE, 1–6.
DOI: Google ScholarCross Ref - [25] . 2018. Earthquake—A NoC-based optimized differential cache-collision attack for MPSoCs. In Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (DATE’18). IEEE, 648–653.
DOI: Google ScholarCross Ref - [26] . 2016. Gossip NoC—Avoiding timing side-channel attacks through traffic management. In Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI’16). IEEE, 601–606.Google ScholarCross Ref
- [27] . 2017. Timing attack on NoC-based systems: Prime+ Probe attack and NoC-based protection. Microprocess. Microsyst. 52 (2017), 556–565.Google ScholarDigital Library
- [28] . 1999. Diffie-hellman Key Agreement Method.
Technical Report . RFC 2631.Google ScholarDigital Library - [29] . 2021. Securing network-on-chips via novel anonymous routing. In Proceedings of the 15th IEEE/ACM International Symposium on Networks-on-Chip. 29–34.Google ScholarDigital Library
- [30] . 2021. A survey on the security of wired, wireless, and 3D network-on-chips. IEEE Access 9 (2021), 107625–107656.
DOI: Google ScholarCross Ref - [31] . 2015. Efficient and flexible NoC-based group communication for secure MPSoCs. In Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig’15). IEEE, 1–6.
DOI: Google ScholarCross Ref - [32] . 2017. Towards protected MPSoC communication for information protection against a malicious NoC. Procedia Comput. Sci. 108 (2017), 1103–1112.Google ScholarCross Ref
- [33] . 2018. Secure communication on NoC-based MPSoC. In Security and Privacy in Communication Networks, , , , and (Eds.). Springer International Publishing, Cham, 417–428. Google ScholarCross Ref
- [34] . 2019. A twofold group key agreement protocol for NoC-based MPSoCs. Trans. Emerg. Telecommun. Technol. 30, 6 (
June 2019), 1–18.DOI: Google ScholarDigital Library - [35] . 2019. A twofold group key agreement protocol for NoC-based MPSoCs. Trans. Emerg. Telecommun. Technol. 30, 6 (2019), 1–18.
DOI: Google ScholarDigital Library - [36] . 2020. Addressing a new class of reliability threats in 3D network-on-chips. IEEE Trans. Comput.-Aided Design Integr. Circ. Syst. 39, 7 (2020), 1358–1371.
DOI: Google ScholarDigital Library - [37] . 2014. DeTrust: Defeating hardware trust verification with stealthy implicitly-triggered hardware Trojans. In Proceedings of the ACM SIGSAC Conference on Computer and Communications Security. ACM, New York, NY, 153–166.
DOI: Google ScholarDigital Library - [38] . 2010. A multifrequency MAC specially designed for wireless sensor network applications. ACM Trans. Embed. Comput. Syst. 9, 4, Article
39 (Apr. 2010), 41 pages.DOI: Google ScholarDigital Library - [39] . 2016. LOFT: A low-overhead fault-tolerant routing scheme for 3D NoCs. Integr. VLSI J. 52 (2016), 41–50.Google ScholarDigital Library
Index Terms
- Securing Network-on-chips Against Fault-injection and Crypto-analysis Attacks via Stochastic Anonymous Routing
Recommendations
Securing network-on-chips via novel anonymous routing
NOCS '21: Proceedings of the 15th IEEE/ACM International Symposium on Networks-on-ChipNetwork-on-Chip (NoC) is widely used as an efficient communication architecture in multi-core and many-core System-on-Chips (SoCs). However, the shared communication resources in NoCs, e.g., channels, buffers, and routers might be used to conduct ...
The roce-bush router: a case for routing-centric dimensional decomposition for low-latency 3D noC routers
CODES+ISSS '12: Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesisAs 3D System-On-Chips (SoCs) come ever closer to becoming the standard for high performance ICs, 3D Networks on Chips (NoCs) have emerged as a key component in meeting performance constraints and ensuring power-efficiency. Among the proposed 3D router ...
Consideration of the Flit Size for Deflection Routing based Network-on-Chips
AISTECS '16: Proceedings of the 1st International Workshop on Advanced Interconnect Solutions and Technologies for Emerging Computing SystemsBufferless deflection routing enables energy and hardware efficient Network-on-Chips (NoCs). However, due to the lack of buffers, packet switching can not be deployed for such NoCs. Therefore, it is crucial to determine an appropriate flit size and link ...
Comments