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Breaking Boundaries: Optimizing FPGA CAD with Flexible and Multi-threaded Re-Clustering

Published: 19 July 2023 Publication History

Abstract

Packing and Placement are critical stages in the FPGA backend computer-aided design (CAD) flow that significantly impact the Quality-of-Results (QoR) of design implementation. Most existing approaches either compromise on generality by focusing on simplified FPGAs with limited block packing legality constraints, or sacrifice quality by making irreversible packing decisions early in the flow, thereby limiting optimization possibilities during placement.
To address these challenges, we propose a novel re-clustering API that enables the packed netlist to be updated at various stages of the packing and placement processes, thereby improving QoR while maintaining flow flexibility and FPGA legality. As a case study for the API, we utilized it to enhance connection-driven packing quality using a multi-threaded iterative improvement packing (IIP) algorithm with smart perturbation generators. Our method reduces wirelength (WL) of the packed netlist by 0.8% and critical path delay (CPD) by 1.1% on average for the VTR benchmarks with the same total runtime, demonstrating the effectiveness of our approach.

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  • (2023)Titan 2.0: Enabling Open-Source CAD Evaluation with a Modern Architecture Capture2023 33rd International Conference on Field-Programmable Logic and Applications (FPL)10.1109/FPL60245.2023.00016(57-64)Online publication date: 4-Sep-2023

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        cover image ACM Other conferences
        HEART '23: Proceedings of the 13th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies
        June 2023
        127 pages
        ISBN:9798400700439
        DOI:10.1145/3597031
        Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than the author(s) must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected].

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        Publication History

        Published: 19 July 2023

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        Author Tags

        1. Clustering
        2. FPGA
        3. Packing
        4. Placement

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        • (2023)Titan 2.0: Enabling Open-Source CAD Evaluation with a Modern Architecture Capture2023 33rd International Conference on Field-Programmable Logic and Applications (FPL)10.1109/FPL60245.2023.00016(57-64)Online publication date: 4-Sep-2023

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