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RISC-V ISA Extension Toolchain Supports: A Survey

Published:27 July 2023Publication History

ABSTRACT

RISC-V is an open source modular and scalable emerging instruction set. As the RISC-V architecture gradually matures in the field of contemporary chips, the RISC-V software ecosystem is also gradually prospering. Some mainstream tool chains and operating systems have supported RISC-V architecture since the beginning, and now gradually support multiple RISC-V expansion directive. Although there are many works dedicated to advancing RISC-V instruction extensions to adapt to various scenarios under different computing power requirements, and exploring the RISC-V software ecosystem, there is no work on existing tool chains and operating systems to extend RISC-V Conduct systematic research and conclusions on the support of the instructions. The purpose of this paper is to systematically and comprehensively investigate and summarize the adaptation of tool chain and operating system to RISC-V extended instructions, including some extensions defined in the RISC-V instruction set specification and some customized Define extensions. In this article, we mainly elaborate on our research from four aspects: operating system, compiler, simulator, and verification tools.

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          • Published in

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            CNIOT '23: Proceedings of the 2023 4th International Conference on Computing, Networks and Internet of Things
            May 2023
            1025 pages
            ISBN:9798400700705
            DOI:10.1145/3603781

            Copyright © 2023 ACM

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            Publication History

            • Published: 27 July 2023

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