Nikhilesh Singh
Abstract
Due to the low costs and energy needed, cyber-physical systems are adopting multi-core processors for their embedded computing requirements. In order to guarantee safety when the application has real-time constraints, a critical requirement is to estimate the worst-case interference from other executing programs. However, the complexity of multi-core hardware inhibits precisely determining the Worst-Case Program Interference. Existing solutions are either prone to overestimate the interference or are not scalable to different hardware sizes and designs.
In this paper we present
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Index Terms
- Kryptonite: Worst-Case Program Interference Estimation on Multi-Core Embedded Systems
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