Erick Chao
ABSTRACT
3D Integrated Circuits (3D-ICs) represent a significant advancement in semiconductor technology, offering enhanced functionality in smaller form factors, improved performance, and cost reductions. These 3D-ICs, particularly those utilizing Through-Silicon Vias (TSVs), are at the forefront of industry trends. They enable the integration of system components from various process nodes, including analog and RF, without being limited to a single node. TSVs outperform wire-bonded System in Package (SiP) in terms of reduced (RLC) parasitics, offering better performance, more power efficiency, and denser implementation. Compared to silicon interposer methods, vertical 3D die stacking achieves higher integration levels, smaller sizes, and quicker design cycles. This presentation introduces a novel AI-driven method designed to tackle the challenges hindering the automation of 3D-IC design flows.
- https://www.cadence.com/en_US/home/tools/digitaldesign-and-signoff/soc-implementation-andfloorplanning/integrity-3dic-platform.htmlGoogle Scholar
Index Terms
- AI for EDA/Physical Design: Driving the AI Revolution: The Crucial Role of 3D-IC
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