AutoHammer: Breaking the Compilation Wall Between Deep Neural Network and Overlay-based FPGA Accelerator

Field-Programmable Gate Array (FPGA) has shown great potential in accelerating Deep Neural Networks (DNNs) due to its characteristics of programmability and high power efficiency. In address the compilation challenges between DNNs and FPGA, we propose AutoHammer, an automated compiler for mapping DNNs to different FPGAs. Specifically, AutoHammer leverages overlay techniques to enable fast and effective implementation. Moreover, three enablers are integrated into AutoHammer. First, the Model Translator optimizes the topology and predicts a DNN's results based on different hardware configurations, built on top of a topology-based representation of DNNs. Second, the Instruction Generator generates pipeline data streams in various FPGA resource configurations by manipulating the instruction set at the upper level rapidly. Last, we realize the End-to-end Optimization, moving the whole computational processes onto the FPGA. Extensive experimental results show that AutoHammer improves great deployment efficiency when validated by 14 types of DNN models on 3 companies' (Xilinx, Fudan Micro, and Pango Micro) mainstream FPGA chips.