Yifei Xia
ABSTRACT
In recent years, LVDS transmission has been widely used in high-speed information transmission [1], and FPGA is used as a receiver chip for LVDS signals in high-speed data transmission examples. Compared with the traditional LVDS data interaction based on SRIO [2], AROURA [3] and other protocols, this paper designs a data processing scheme for high-speed CMOS under the FPGA platform, high-speed CMOS data output without coding, multi-channel (from tens to hundreds of channels) parallel transmission form, so that the timing control and data restoration of the acquisition end is more difficult, this design through the multi-channel LVDS data bit reception, parallel processing and channel synchronization work. The design of the whole set of data acquisition scheme is completed, and the method is verified by experiments, which realizes the reception, parallel processing and channel synchronization of LVDS data in each channel, ensuring the stability and reliability of data during transmission.
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Index Terms
- Design of High-speed CMOS Image Sensor Data Acquisition Based on FPGA
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