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RGMU: A High-flexibility and Low-cost Reconfigurable Galois Field Multiplication Unit Design Approach for CGRCA

Published: 15 February 2024 Publication History

Abstract

Finite field multiplication is a non-linear transformation operator that appears in the majority of symmetric cryptographic algorithms. Numerous specified finite field multiplication units have been proposed as a fundamental module in the coarse-grained reconfigurable cipher logic array to support more cryptographic algorithms; however, it will introduce low flexibility and high overhead, resulting in reduced performance of the coarse-grained reconfigurable cipher logic array. In this article, a high-flexibility and low-cost reconfigurable Galois field multiplication unit (RGMU) is proposed to balance the tradeoffs between the function, delay, and area. All the finite field multiplication operations, including maximum distance separable matrix multiplication, parallel update of Fibonacci linear feedback shift register, parallel update of Galois linear feedback shift register, and composite field multiplication, are analyzed and two basic operation components are abstracted. Further, a reconfigurable finite field multiplication computational model is established to demonstrate the efficacy of reconfigurable units and guide the design of RGMU with high performance. Finally, the overall architecture of RGMU and two multiplication circuits are introduced. Experimental results show that the RGMU can not only reduce the hardware overhead and power consumption but also has the unique advantage of satisfying all the finite field multiplication operations in symmetric cryptography algorithms.

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  1. RGMU: A High-flexibility and Low-cost Reconfigurable Galois Field Multiplication Unit Design Approach for CGRCA

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      Published In

      cover image ACM Transactions on Design Automation of Electronic Systems
      ACM Transactions on Design Automation of Electronic Systems  Volume 29, Issue 2
      March 2024
      438 pages
      EISSN:1557-7309
      DOI:10.1145/3613564
      • Editor:
      • Jiang Hu
      Issue’s Table of Contents

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      Association for Computing Machinery

      New York, NY, United States

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      Publication History

      Published: 15 February 2024
      Online AM: 09 January 2024
      Accepted: 30 December 2023
      Revised: 31 August 2023
      Received: 27 February 2023
      Published in TODAES Volume 29, Issue 2

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      Author Tags

      1. Coarse-grained reconfigurable cipher logic arrays
      2. symmetric cipher
      3. finite field multiplication
      4. parallelism

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      • National Natural Science Foundation of China

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