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Approximating the Geometry of Temporal Logic Formulas

Published: 14 May 2024 Publication History

Abstract

We present an algorithm for approximating the language of a temporal logic formula, that is, the set of all signals that satisfy the formula. Most tasks involving temporal logic require determining whether a signal satisfies the formula, or finding such satisfying signals: example tasks include monitoring, testing, control synthesis, formula inference, and example generation. In the majority of cases this is done via search heuristics, especially for logics not always amenable to exhaustive methods. Search heuristics take a variable time to run and might not converge to the desired signals. There is a wide variety of heuristics and, apart from falsification, no solid guidelines for choosing between them. We take a different approach: we directly approximate the entire language of the formula. With such an approximation, we might solve the above tasks faster and/or obtain guarantees on the solution. For example, generating satisfying signals reduces to random sampling in a union of polytopes. This paper focuses on the language approximation process. We do this approximation in the special case of discrete-time Signal Temporal Logic. We show the language in this case is a union of polytopes, and upper bound the number of polytopes. We then present an algorithm for approximating this language. We evaluate the algorithm empirically and observe that it is often able to compute a highly accurate representation of the language, and that for a fixed language, the algorithm requires fewer iterations as the length of the signal increases. These results suggest that working with the language is a viable way to solving many temporal logic tasks, and raise interesting theoretical questions for investigation.

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      cover image ACM Conferences
      HSCC '24: Proceedings of the 27th ACM International Conference on Hybrid Systems: Computation and Control
      May 2024
      307 pages
      ISBN:9798400705229
      DOI:10.1145/3641513
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      Published: 14 May 2024

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      Author Tags

      1. Temporal logic
      2. monitoring
      3. set geometry
      4. synthesis

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      HSCC '24: Computation and Control
      May 14 - 16, 2024
      Hong Kong SAR, China

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