research-article

A Cache/Algorithm Co-design for Parallel Real-Time Systems with Data Dependency on Multi/Many-core System-on-Chips

Authors:

Jing LiAuthors Info & Claims

DAC '24: Proceedings of the 61st ACM/IEEE Design Automation Conference

Article No.: 143, Pages 1 - 6

https://doi.org/10.1145/3649329.3657372

Published: 07 November 2024 Publication History

Abstract

Parallel real-time systems rely on a shared cache for dependent data transmission. A conventional shared cache suffers from intensive interference, yet existing cache management techniques only ensure determinism for single-threaded tasks. This paper introduces a virtual indexed, physically tagged, selectively-inclusive, non-exclusive L1.5 Cache, offering way-level control and fine-grained sharing capabilities. Focusing on DAG tasks, we construct a scheduling method that exploits the L1.5 Cache to reduce data transmission, hence, the makespan. As a systematical solution, we built a real system, from the SoC and the ISA to the programming model. Experiments show that our solution significantly improves the timing performance of DAG tasks with negligible overheads.

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Cited By

Gao YYi HChen HFang XZhao S(2024)A Structure-Aware DAG Scheduling and Allocation on Heterogeneous Multicore Systems2024 IEEE 14th International Symposium on Industrial Embedded Systems (SIES)10.1109/SIES62473.2024.10767927(26-33)Online publication date: 23-Oct-2024
https://doi.org/10.1109/SIES62473.2024.10767927

Index Terms

A Cache/Algorithm Co-design for Parallel Real-Time Systems with Data Dependency on Multi/Many-core System-on-Chips
1. Computer systems organization
2. Hardware
  1. Integrated circuits
    1. Semiconductor memory
      1. Dynamic memory

Index terms have been assigned to the content through auto-classification.

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cover image ACM Conferences

DAC '24: Proceedings of the 61st ACM/IEEE Design Automation Conference

June 2024

2159 pages

ISBN:9798400706011

DOI:10.1145/3649329

Chair:
Vivek De

Copyright © 2024 Copyright is held by the owner/author(s). Publication rights licensed to ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than the author(s) must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected].

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SIGDA: ACM Special Interest Group on Design Automation
IEEE-CEDA

In-Cooperation

SIGBED: ACM Special Interest Group on Embedded Systems

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 07 November 2024

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Research-article

Funding Sources

National Key Research and Development Program of China
National Natural Science Foundation of China
Guangzhou Fundamental Research Funds
Fundamental Research Funds for the Central Universities
National Science Foundation

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DAC '24

Sponsor:

SIGDA

DAC '24: 61st ACM/IEEE Design Automation Conference

June 23 - 27, 2024

CA, San Francisco, USA

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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DAC '25

Sponsor:
sigda

62nd ACM/IEEE Design Automation Conference

June 22 - 26, 2025

San Francisco , CA , USA

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Cited By

Gao YYi HChen HFang XZhao S(2024)A Structure-Aware DAG Scheduling and Allocation on Heterogeneous Multicore Systems2024 IEEE 14th International Symposium on Industrial Embedded Systems (SIES)10.1109/SIES62473.2024.10767927(26-33)Online publication date: 23-Oct-2024
https://doi.org/10.1109/SIES62473.2024.10767927

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