Wojciech Maly
ABSTRACT
Nanometer IC technologies are on the horizon. They promise a lot. But will cost a lot as well. Therefore, we need to ask today: How may the billions of dollars, that we will have to spent on nanometer-fablines, affect IC design domain? This paper attempts to address the above question by analyzing the design-manufacturing interface. A partial answer is derived from a simple transistor cost model proposed in the body of the paper.
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Index Terms
- IC design in high-cost nanometer-technologies era
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