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Optimal time borrowing analysis and timing budgeting optimization for latch-based designs

Published:01 January 2002Publication History
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Abstract

An interesting property of a latch-based design is that the combinational path delay is allowed to be longer than the clock cycle as long as it can "borrow" time from the shorter paths in the subsequent logic stages. This gives designers a lot of flexibility in designing circuits, especially high performance ones. However, it also increases the complexity in timing analysis. Finding the best clock period or determining how much time to borrow from the subsequent logic stages is difficult especially for designs containing multiple clocks, mixed-clock paths, user-specified multicycle paths, and false paths. In this article, we formulate the time borrowing problem as a linear programming problem. An optimal time borrowing solution can be found by solving the formulation. Based on this time borrowing solver, algorithms are proposed for timing optimization to achieve the optimal clock period. Experimental results show our algorithm is efficient and yields very good results.

References

  1. BELKHALE, K. AND SUESS, A. 1995. Timing analysis with known false subgraphs. In Proceedings of IEEE/ACM ICCAD (Nov.), 736-740. Google ScholarGoogle Scholar
  2. LEE, J., TANG, D., AND WONG, C. 1994. A timing analysis algorithm for circuits with level-sensitive latches. In Proceedings of IEEE/ACM ICCAD (Nov.), 743-748. Google ScholarGoogle Scholar
  3. SAKALLAH, K., MUDGE, T., AND OLUKOTUN, O. 1990a. Analysis and design of latch-controlled synchronous digital circuits. In Proceedings of ACM/IEEE DAC (June), 111-117. Google ScholarGoogle Scholar
  4. SAKALLAH, K., MUDGE, T., AND OLUKOTUN, O. 1990b. Check tc and min tc: Timing verification and optimal clocking of synchronous digital circuit. In Proceedings of IEEE/ACM ICCAD (Nov.), 552-555.Google ScholarGoogle Scholar
  5. SZYMANSKI, T. 1992. Computing optimal clock schedules. In Proceedings of ACM/IEEE DAC (June), 399-404. Google ScholarGoogle Scholar
  6. SZYMANSKI, T. AND SHENOY, N. 1992. Verifying clock schedules. In Proceedings of IEEE/ACM ICCAD (Nov.), 124-131. Google ScholarGoogle Scholar

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  1. Optimal time borrowing analysis and timing budgeting optimization for latch-based designs

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