Abstract
The unmanageably large size of reference traces has spurred the development of sophisticated trace reduction techniques. In this article we present two new algorithms for trace reduction: Safely Allowed Drop (SAD) and Optimal LRU Reduction (OLR). Both achieve high reduction factors and guarantee exact simulations for common replacement policies and for memories larger than a user-defined threshold. In particular, simulation on OLR-reduced traces is accurate for the LRU replacement algorithm, while simulation on SAD-reduced traces is accurate for the LRU and OPT algorithms. Both policies can easily be modified and extended to maintain timing information, thus allowing for exact simulation of the Working Set and VMIN policies. OLR also satisfies an optimality property: for a given original trace and chosen memory size, it produces the shortest possible reduced trace that has the same LRU behavior as the original for a memory of at least the chosen size. We present a proof of this optimality of OLR, and show that SAD, while not optimal, yields nearly optimal performance in practice.Our approach has multiple applications, especially in simulating virtual memory systems; many page replacement algorithms are similar to LRU in that more recently referenced pages are likely to be resident. For several replacement algorithms in the literature, SAD- and OLR-reduced traces yield exact simulations. For many other algorithms, our trace reduction eliminates information that matters little: we present extensive measurements to show that the error for simulations of the clock and segq (segmented queue) replacement policies (the most common LRU approximations) is under 3% for the vast majority of memory sizes. In nearly all cases, the error is much smaller than that incurred by the well-known stack deletion technique.SAD and OLR have many desirable properties. In practice, they achieve reduction factors up to several orders of magnitude. The reduction translates to both storage savings and simulation speedups. Both techniques require little memory and perform a single forward traversal of the original trace, making them suitable for online trace reduction. Neither requires that the simulator be modified to accept the reduced trace.
- Agarwal, A. and Huffman, M. 1990. Blocking: Exploiting spatial locality for trace compaction. In Proceedings of ACM SIGMETRICS, 48--57. Google Scholar
- Babaoglu, O. 1981. Efficient generation of memory reference strings based on the LRU stack model of program behaviour. In Proceedings of PERFORMANCE '81, 373--383.Google Scholar
- Babaoglu, O. and Ferrari, D. 1983. Two-level replacement decisions in paging stores. IEEE Trans. Comput. C-32, 12 (Dec.), 1151--1159.Google Scholar
- Belady, L. A. 1966. A study of replacement algorithms for virtual storage. IBM Syst. J. 5:78--101.Google Scholar
- Coffman, E. G. and Randell, B. 1970. Performance predictions for extended paged memories. Acta Inf. 1, 1--13.Google Scholar
- Cormen, T. H., Leiserson, C. E., and Rivest, R. L. 1989. Introduction to Algorithms. McGraw-Hill and MIT Press, New York. Google Scholar
- Denning, P. J. 1976. The working set model for program behavior. Commun. ACM 19, 5, 285--294.Google Scholar
- Douglis, F. 1993. The compression cache: Using on-line compression to extend physical memory. In Proceedings of 1993 Winter USENIX Conference (San Diego), 519--529.Google Scholar
- Fernandez, E. B., Lang, T., and Wood, C. 1978. Effect of replacement algorithms on a paged buffer database system. IBM Syst. J. 22, 2, 185--196.Google Scholar
- Glass, G. and Cao, P. 1997. Adaptive page replacement based on memory reference behavior. In Proceedings of SIGMETRICS The 1997 ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems, Vol. 25, ACM Press, New York, 115--126. Google Scholar
- Johnson, E. E. and Ha, J. 1994. Pdats: Lossless address trace compression for reducing file size and access time. In Proceedings of the IEEE International Conference on Computers and Communications, 213--219.Google Scholar
- Kaplan, S. F. WWW trace reduction Web-page. Available at: <http://www.cs.amherst.edu/∼sfkaplan/research/trace-reduction>.Google Scholar
- Kaplan, S. F. 1999. Compressed caching and modern virtual memory simulation. PhD thesis, Department of Computer Sciences, University of Texas at Austin. Google Scholar
- Kaplan, S. F., Smaragdakis, Y., and Wilson, P. R. 1999. Trace reduction for virtual memory simulations. In Proceedings of SIGMETRICS99. International Conference on Measurerment and Modeling of Computer Systems, 47--58. Google Scholar
- Lee, D. C., Crowley, P., J., Baer, J. L., Anderson, T. E., and Bershad, B. N. 1998. Execution characteristics of desktop applications on windows NT. In Proceedings of the 25th Annual International Symposium on Computer Architecture, IEEE Computer Society Press, Los Alamitos, Ca. Google Scholar
- Mattson, R. L., Gecsei, J., Slutz, D. R., and Traiger, I. L. 1970. Evaluation techniques for storage hierarchies. IBM Syst. J. 9, 78--117.Google Scholar
- Phalke, V. 1995. Modeling and managing program references in a memory hierarchy. PhD thesis, Rutgers University. Google Scholar
- Prieve, B. G. and Fabry, R. S. 1976. VMIN---an optimal variable space page-replacement algorithm. Commun. ACM 19, 5 (May), 295--297. Google Scholar
- Puzak, T. R. 1985. Analysis of cache replacement algorithms. PhD thesis, University of Massachusetts, Dept. of Electrical and Computer Engineering. Google Scholar
- Robertson, J. and Devarakonda, M. 1990. Data cache management using frequency-based replacement. In Proceedings of the SIGMETRICS International Conference on Measurement and Modeling of Computer Systems. Google Scholar
- Samples, A. D. 1989. Mache: No-loss trace compaction. In Proceedings of ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems, 89--97. Google Scholar
- Smaragdakis, Y. 1998. Optimal trace reduction for LRU-based simulations. Tech. Rep. 98-25, The University of Texas at Austin. Google Scholar
- Smaragdakis, Y., Kaplan, S. F.,and Wilson, P. R. 1999.EELRU: Simple and efficient adaptive page replacement. In Proceedings of the SIGMETRICS99 International Conference on Measurement and Modeling of Computer Systems, 122--133. Google Scholar
- Smaragdakis, Y., Kaplan, S. F., and Wilson, P. R. 1999. EELRU: Simple and efficient adaptive page replacement. In Proceedings of the SIGMETRICS99 International Conference on Measurement and Modeling of Computer Systems, 122--133. Google Scholar
- Smith, A. J. 1977. Two methods for the efficient analysis of address trace data. IEEE Trans. Softw. Eng. SE-3, 1 (Jan.).Google Scholar
- Turner, R. and Levy, H. 1981. Segmented FIFO page replacement. In Proceedings of SIGMETRICS The 1981 ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems, ACM Press, new York. Google Scholar
- Uhlig, R. A. and Mudge, T. N. 1997. Trace-driven memory simulation: A survey. Comput. Surv. 29, 2, 128--170. Google Scholar
- Wilson, P. R. 1991. Operating system support for small objects. In Proceedings of the International Workshop on Object Orientation in Operating Systems, IEEE Press, Palo Alto, CA, 80--86.Google Scholar
- Wilson, P. R., Kaplan, S. F., and Smaragdakis, Y. 1999. The case for compressed caching in virtual memory systems. In Proceedings of the 1999 USENIX Annual Technical Conference, USENIX Association (Monterey, CA), 101--116. Google Scholar
Index Terms
- Flexible reference trace reduction for VM simulations
Recommendations
Lossless Trace Compression
The tremendous storage space required for a useful data base of program traces has prompted a search for trace reduction techniques. In this paper, we discuss a range of information-lossless address and instruction trace compression schemes that can ...
WCET analysis of instruction cache hierarchies
With the advent of increasingly complex hardware in real-time embedded systems (processors with performance enhancing features such as pipelines, caches, multiple cores), most embedded processors use a hierarchy of caches. While much research has been ...
Comments