ABSTRACT
Critical timing races (hazards) are a potential problem in digital systems consisting of a large number of interchangeable modules and replaceable integrated circuits. These hazards can be minimized by careful design procedures and reviews but will still exist due to system complexities. Systems have been proposed for simulating digital networks based on a time-sequenced logical tracing, but these systems require much host computer time and input stimuli to thoroughly exercise the system. The basis of the proposed race analysis system is that all critical races result in an improper flip-flop state. Each flip-flop input is traced, from logic element out-put to input, accumulating delays. Two basic algorithms are required and described to locate the racing of parallel paths on flip-flop inputs. This system requires minimal user inputs and can perform either a statistical or worst case race analysis.
- 1.L. C. Bening, Jr. "Accurate Simulation of High Speed Computer Logic," Proc. of the SHARE. ACM. IEEE Design Automation Workshop, pp. 103-112, 1969. Google ScholarDigital Library
- 2.T. I. Kirkpatrick and N. R. Clark, "PERT as an Aid to Logic Design," IBM J. R&D, Vol. 10, pp. 135-141, March 1966.Google ScholarDigital Library
- 3.G. G. Hays, "Computer-Aided Design: Simulation of Digital Design Logic," IEEE Trans. Computer, Vol. C-18, pp. 1-10, January 1969.Google Scholar
- 4.H. D. Schnurmann and K. Maling, "A Statistical Approach to the Compuation of Delays in Logic Circuits," IEEE Trans. Computers, Vol. C-18, pp. 320-328, April 1969.Google Scholar
- 5.J. B. Tommerdahl, A. C. Nelson, and K. K. Mazuy, "Mathematical Models for Predicting Pulse Characteristics in Digital Logic Systems," IEEE Trans. Computers, Vol. EC-13, pp. 705-710, December 1964.Google ScholarCross Ref
- 6.W. J. Dunnet and Y. C. Ho, "Statistical Analysis of Transistor-Resistor Logic Networks," 1960 IRE International Convention Record, Part 2, pp. 11-40.Google Scholar
- 7.E. Nussbaum, E. A. Irland, and C. E. Young, "Statistical Analysis of Logic Circuit Performance in Digital Systems," Proc. IRE, Vol. 49, pp.236-244, January 1961.Google ScholarCross Ref
Index Terms
- Race analysis of digital systems without logic simulation
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