Park Jung-Wook
ABSTRACT
This paper proposes a modified two-way set associative cache for embedded systems to reduce the energy consumption. For this goal, the proposed cache, called SSA (selective-way-access skewed associative) cache, equips with a way-selecting mechanism controlled by skewing function and small table look-up, which also has the reconfigurable ability to be converted to one direct mapped cache on a specific application. The skewing mechanism including differentiated mapping function for each cache set, and specialized replacement policy enables the perfect speculation in way-selection and decreases conflict misses. Consequently, the proposed cache effectively achieves the energy reduction without any performance degradation. Additional delay of a small table look-up for the way selection can be hidden partly and multiplexer delay in critical path can be removed totally, such that overall cache access time becomes almost same as that of conventional set associative cache. The simulation result shows that the proposed cache structure reduces energy consumption up to 30~55% over conventional set associative cache and up to 25~30% over previous way-prediction caches. Furthermore, the software controlled reconfigurable architecture brings flexibility with the proposed cache to operate as direct mapped cache or way selecting cache based on given application adaptively.
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Index Terms
- An energy efficient cache memory architecture for embedded systems
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Reviews
Mehran Rezaei
This paper presents a version of skewed associative cache, called selective-way-access skewed associative (SSA), for embedded systems. The SSA illustrates less energy consumption in comparison with direct mapped and two-way/four-way set associative caches. The work does not offer any new breakthrough ideas. Skewed associative caches have been proposed from the early 1990s. Seznec and Bodin, who the authors cited, talked about different skewed associative caches. The authors of this paper did provide different hashing functions for the skewed set (the second set for avoiding the cache conflict misses). Some new components, such as the lookup table to get to the sets, are also introduced. Since SimpleScalar tool sets have a cache simulator, I do not understand why the authors needed to dump the cache traces, and use Dinero to evaluate the cache behavior of the MediaBench benchmarks. I did like the last table on page 889, Table 3. This table reports that the proposed cache organization (SSA) outperforms any other of the listed caches. What remains to be explained is the abrupt change in energy consumption between two-way and four-way set associative caches. I fully understand why four-way and two-way prediction caches perform better than their counterparts. Way-prediction caches reveal fewer cache misses, and therefore more accesses hit the cache, and do not need the second level cache access. Overall, having said that a great percentage of the energy consumed in embedded systems is spent in the memory hierarchy, it seems very rational to spend a lot of time on research to improve the energy consumed in the cache, or to improve the locality behavior of media applications, something that I think is worth exploring. I found the English in this paper to be very poor. I had a hard time reading the text; I needed to read a paragraph several times to understand its point. Online Computing Reviews Service
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