skip to main content
10.1145/988952.989001acmconferencesArticle/Chapter ViewAbstractPublication PagesglsvlsiConference Proceedingsconference-collections
Article

A device-level placement with multi-directional convex clustering

Authors Info & Claims
Published:26 April 2004Publication History

ABSTRACT

A challenge to an automated layout of analog IC starts with the insight into a high quality placement crafted by experts. It has been observed that such a placement comprises clusters corresponding to groups of matched devices and devices are placed faithfully to the drawn schema while the placement is still compacted. This paper proposes a novel device-level placement based on Sequence-Pair which includes an effective representation of clusters extracted from the schema. A key idea is to capture a topological structure of clusters in order to place clusters at as faithful positions to those in the schema. We represent this structure in terms of ABLR-relations which can be translated into Sequence-Pair. In experiments, we tested our algorithm for industrial instances and compared the results with those by manual. We showed that our results were better than manual results by, on average, 12.8% and 18.1% with respect to area and net-length.

References

  1. J. Rijmenants, J. B. Litsios, T. R. Schwarz, and M. Degrauwe, "ILAC: An Automated Layout Tool for Analog CMOS Circuits", IEEE J. of Solid-State Circuits, Vol.SC-24, No.2, pp.417--pp.425, 1989.Google ScholarGoogle ScholarCross RefCross Ref
  2. S. W. Mehranfar, "A Technology-Independent Approach to Custom Analog Cell Generation", IEEE Trans. Solid-State Circuits, Vol.26, No.3, pp.386--393, 1991.Google ScholarGoogle ScholarCross RefCross Ref
  3. J. Cohn, D. Garrod, R. Rutenbar, and L. Carley, "Analog Device-Level Automation", Kluwer Academic Publishers, 1994. Google ScholarGoogle ScholarDigital LibraryDigital Library
  4. H. Murata, K. Fujiyoshi, S. Nakatake, and Y. Kajitani, "Rectangle-Packing-Based Module Placement", International Conference on Computer Aided Design 1995, pp.472--479, 1995. Google ScholarGoogle ScholarDigital LibraryDigital Library
  5. H. Murata, K. Fujiyoshi, S. Nakatake, and Y. Kajitani, "VLSI Module Placement Based on Rectangle-Packing by the Sequence-Pair", IEEE Trans. Computer-Aided Design, Vol.15, No.12, pp.1518--1524, 1996. Google ScholarGoogle ScholarDigital LibraryDigital Library
  6. S. Nakatake, K. Fujiyoshi, H. Murata, and Y. Kajitani, "Module Placement on BSG-Structure and IC Layout Applications", International Conference on Computer Aided Design 1996, pp.484--pp.491, 1996. Google ScholarGoogle ScholarDigital LibraryDigital Library
  7. E. Malavasi, E. Charbon, E. Felt, and A. Sangiovanni-Vincentelli, "Automation of IC Layout with Analog Constraints", IEEE Trans. on Computer-Aided Design, Vol.15, No.8, pp.923--942, 1996. Google ScholarGoogle ScholarDigital LibraryDigital Library
  8. F. Balasa and K. Lampaert, "Module Placement for Analog Layout Using the Sequence-Pair Representation", Design Automation Conference 1999, pp.274--279, 1999. Google ScholarGoogle ScholarDigital LibraryDigital Library
  9. K. Lampaert, G. Gielen, and W. Sabsen "Analog Layout Generation for Performance and Manufacturability", Kluwer Academic Publishers, 1999.Google ScholarGoogle Scholar
  10. X. Tang, D. F. Wong, "FAST-SP: A Fast Algorithm for Block Placement based on Sequence-Pair", Asia and South Pacific Design Automation Conference 2001, pp.521--526, 2001. Google ScholarGoogle ScholarDigital LibraryDigital Library

Index Terms

  1. A device-level placement with multi-directional convex clustering

        Recommendations

        Comments

        Login options

        Check if you have access through your login credentials or your institution to get full access on this article.

        Sign in
        • Published in

          cover image ACM Conferences
          GLSVLSI '04: Proceedings of the 14th ACM Great Lakes symposium on VLSI
          April 2004
          479 pages
          ISBN:1581138539
          DOI:10.1145/988952

          Copyright © 2004 ACM

          Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

          Publisher

          Association for Computing Machinery

          New York, NY, United States

          Publication History

          • Published: 26 April 2004

          Permissions

          Request permissions about this article.

          Request Permissions

          Check for updates

          Qualifiers

          • Article

          Acceptance Rates

          Overall Acceptance Rate312of1,156submissions,27%

          Upcoming Conference

          GLSVLSI '24
          Great Lakes Symposium on VLSI 2024
          June 12 - 14, 2024
          Clearwater , FL , USA

        PDF Format

        View or Download as a PDF file.

        PDF

        eReader

        View online with eReader.

        eReader